allow human readable names inside modules

[cpt-n3mo]

Good day!

i was wondering if there was a way to get somewhat more human readable names inside the modules,.. so that when one is using a simulation tool like iverilog & gtkwave, one can know by name what module belongs to what signal, as its quite difficult to figure out what signals are from what module logic..? i understand these are random generated names, but it would be nice if we could add a custom name to every module / logic block so that simulation tools become more clear in use,, as this makes it quite unusable...

im now ending up writing everything in normal text editor to test every thing, that i then later have to migrate to ice studio.

kind regards!

[cavearr]

Hi!, i'm working on it now, very soon i'm releasing it.

When this feature would be available in the WIP version, i'm telling you in this thread.

Thanks for your feedback!

[cpt-n3mo]

Good day!

awesome ! this would be perfect..

regards!