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KLAYOUT Not Integrating with IHP Open PDK [ LIBRARY AND DEVICES ARE NOT FOUND] #305

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Ikram-rs22 opened this issue Dec 21, 2024 · 19 comments

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@Ikram-rs22
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I'm trying to integrate Klayout with the ihp open sg13g2 pdk but there seems to be a problem. I have integrated the pdk tech file with Klayout as shown below

pdk integration

After that I exit and re-enter klayout but then this error is shown in the command line

klayout command

And also there is no SG13_dev library in the library sections as a result no devices are found

klayout

But when I ran the pycell_test.py file a sg13_dev.gds file is created where I can see the devices

sg13dev

But still there is no library from which I can instantiate the cells. DRC and LVS options are visible and running but no devices. Please help.

@adrienluitot
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Did you fetch the submodules? Like pypreprocessor and pycell4klayout-api

@Ikram-rs22
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No I didn't. Where can I get those? @adrienluitot

@Ikram-rs22
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Thanks the problem is solved. But I've noticed that when you increase or decrease the width and lengths of inductors and capacitors, the effect takes place but the value of inductance, capacitance showing in the paramter window doesn't change. So what to make of it?

@adrienluitot
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Nice! Well done!

For the inductance and resistance value, I don’t think it is working. I only gave a quickly look at the PCell code, but didn’t found anything that updates those values. But it is something a little complicated to compute I think, I’m not sure there is a perfect formula.

As far as I know for the moment, the best thing to do is to generate a layout in KLayout, save the GDS and simulate your inductor in OpenEMS.

I started a Google Sheet with some simulated values (around 2.45GHz), I can share it if you wish.

@Ikram-rs22
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Thanks it'd be a tremendous help if you shared your file.

@akrinke
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akrinke commented Dec 23, 2024

We (TU Dresden) are currently working on a more accurate inductance extraction. It taps into the LVS, exports the geometry of inductors and runs FastHenry. The calculated inductance values are then added to the extracted netlist. We hope to have it packaged in a fork for testing at the end of January.

@Ikram-rs22
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Will the january pdk then have inductors as schematic components? For circuit design?

@adrienluitot
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Thanks it'd be a tremendous help if you shared your file.

https://docs.google.com/spreadsheets/d/1vt_hs9XaM-SnFTcuAcVK475XKEWRAJqNsY20x1bT3ns/
There you go.
It is more of a draft than anything else, I might simulate more inductors with time. Maybe I might try to do a linear regression if I have enough simulations.

@adrienluitot
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We (TU Dresden) are currently working on a more accurate inductance extraction. It taps into the LVS, exports the geometry of inductors and runs FastHenry. The calculated inductance values are then added to the extracted netlist. We hope to have it packaged in a fork for testing at the end of January.

Good news ! It’s forgot about LVS, I don’t know it’s managed for the moment… maybe juste waived?

Anyway, glad to see some people are working on the inductors!

@akrinke
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akrinke commented Dec 23, 2024

I guess our approach shouldn't be the default mode. Ideally, the inductor PCells (schematic and layout) should update the inductance value based on the geometry parameters. Then LVS just checks the geometry. However, using FastHenry makes sense for hand-drawn inductors.

@adrienluitot
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I think most PDK just give well tested non-editable inductors. It seems to be harder to estimate the value of an inductor than of a resistor. But maybe this PDK could use a “simple” inductor formula to approximate its value to be LVS compatible. Maybe they already do that, I’m not sure.

I don’t know about FastHenry, I will inquire.

@sergeiandreyev
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But maybe this PDK could use a “simple” inductor formula to approximate its value to be LVS compatible.

it should be possible, at least I see this behavior in proprietary PDK
unfortunately, many of the Pycell callbacks are still not implemented, it's a work in progress

@Ikram-rs22
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@sergeiandreyev for RF designof high frequencies (beyond 100 GHz), there are no RF probe pad or DC pads in klayout. As such, my intuition tells me it isn't possible to design RF circuits. Could you elaborate on that?

@sergeiandreyev
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@Ikram-rs22, you mean the lack of pad device as KLayout parameterized cell (Pycell)? because we have bondpad layout in sg13g2_pr library
on the pad support - we're going to provide a temporary Pycell for KLayout in a short term, currently we have internal model update/development for this device in progress, but the expected time frame is somewhere in spring..

@Ikram-rs22
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Ikram-rs22 commented Jan 3, 2025

Did you mean this bondpad and cupillar pad @sergeiandreyev ?

IMG-20250103-WA0005

As far as I know any RF layout has pads for signal input and also dc biasing? will these pads suffice for those? And also for Dc - 150 GHz range? Moreover, is there any openMPW in March and will the pycell be available before that? Thanks in advance.

@sergeiandreyev
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@Ikram-rs22, yes, I mean these cells
and yes, there will be 140 mm2 available on March TapeOut for the open source community:
https://ihp-open-ip.readthedocs.io/en/latest/
and the plans are to provide the pad Pycell before that

  • to your specific questions on pads I'll double check internally and come back to you

@Ikram-rs22
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@sergeiandreyev any update on the RF GSG pads for RF signal path and DC pads for biasing? The rf_cmim cpacitor pycell is not present in layout but the qucs-s library has one? How to resolve this issue in layout where there is no pycell for rf_cmim??

@sergeiandreyev
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Hi @Ikram-rs22, on the pads no updates for now, I'll have a discussion this week
On the rfcmim Pycell - it's in progress, should be ready this week or beginning next week worst case

@Ikram-rs22
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Thanks a lot. Could you also kindly take a look at issue no 325?

sergeiandreyev added a commit that referenced this issue Jan 15, 2025
Signed-off-by: Sergei Andreev <andreev@ihp-microelectronics.com>
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