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cpu9
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#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1110-g18392a46)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "C:\iverilog\lib\ivl\system.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2009.vpi";
S_00000241c665b170 .scope package, "$unit" "$unit" 2 1;
.timescale 0 0;
S_00000241c65f0b80 .scope module, "tb" "tb" 3 6;
.timescale 0 0;
L_00000241c6668c20 .functor BUFZ 16, L_00000241c6681980, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_0 .array/port v00000241c667bca0, 0;
L_00000241c6668360 .functor BUFZ 16, v00000241c667bca0_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_1 .array/port v00000241c667bca0, 1;
L_00000241c6668c90 .functor BUFZ 16, v00000241c667bca0_1, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_2 .array/port v00000241c667bca0, 2;
L_00000241c6668520 .functor BUFZ 16, v00000241c667bca0_2, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_3 .array/port v00000241c667bca0, 3;
L_00000241c66683d0 .functor BUFZ 16, v00000241c667bca0_3, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_4 .array/port v00000241c667bca0, 4;
L_00000241c6668ad0 .functor BUFZ 16, v00000241c667bca0_4, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_5 .array/port v00000241c667bca0, 5;
L_00000241c6668670 .functor BUFZ 16, v00000241c667bca0_5, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_6 .array/port v00000241c667bca0, 6;
L_00000241c66688a0 .functor BUFZ 16, v00000241c667bca0_6, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_7 .array/port v00000241c667bca0, 7;
L_00000241c6668600 .functor BUFZ 16, v00000241c667bca0_7, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_8 .array/port v00000241c667bca0, 8;
L_00000241c66686e0 .functor BUFZ 16, v00000241c667bca0_8, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_9 .array/port v00000241c667bca0, 9;
L_00000241c6668d00 .functor BUFZ 16, v00000241c667bca0_9, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_10 .array/port v00000241c667bca0, 10;
L_00000241c6668750 .functor BUFZ 16, v00000241c667bca0_10, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_11 .array/port v00000241c667bca0, 11;
L_00000241c66689f0 .functor BUFZ 16, v00000241c667bca0_11, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_12 .array/port v00000241c667bca0, 12;
L_00000241c66687c0 .functor BUFZ 16, v00000241c667bca0_12, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_13 .array/port v00000241c667bca0, 13;
L_00000241c6668de0 .functor BUFZ 16, v00000241c667bca0_13, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_14 .array/port v00000241c667bca0, 14;
L_00000241c661d520 .functor BUFZ 16, v00000241c667bca0_14, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667bca0_15 .array/port v00000241c667bca0, 15;
L_00000241c661d750 .functor BUFZ 16, v00000241c667bca0_15, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c6681f20_0 .net *"_ivl_0", 15 0, L_00000241c6681980; 1 drivers
v00000241c6682880_0 .var "clock", 0 0;
v00000241c6681fc0_0 .net "finished", 0 0, v00000241c6680ff0_0; 1 drivers
v00000241c6682380_0 .var/i "i", 31 0;
v00000241c6681de0_0 .net "instruction", 15 0, L_00000241c6668c20; 1 drivers
v00000241c6682100 .array "instructions", 256 0, 15 0;
v00000241c6682f60 .array "register_file", 0 15;
v00000241c6682f60_0 .net v00000241c6682f60 0, 15 0, L_00000241c6668360; 1 drivers
v00000241c6682f60_1 .net v00000241c6682f60 1, 15 0, L_00000241c6668c90; 1 drivers
v00000241c6682f60_2 .net v00000241c6682f60 2, 15 0, L_00000241c6668520; 1 drivers
v00000241c6682f60_3 .net v00000241c6682f60 3, 15 0, L_00000241c66683d0; 1 drivers
v00000241c6682f60_4 .net v00000241c6682f60 4, 15 0, L_00000241c6668ad0; 1 drivers
v00000241c6682f60_5 .net v00000241c6682f60 5, 15 0, L_00000241c6668670; 1 drivers
v00000241c6682f60_6 .net v00000241c6682f60 6, 15 0, L_00000241c66688a0; 1 drivers
v00000241c6682f60_7 .net v00000241c6682f60 7, 15 0, L_00000241c6668600; 1 drivers
v00000241c6682f60_8 .net v00000241c6682f60 8, 15 0, L_00000241c66686e0; 1 drivers
v00000241c6682f60_9 .net v00000241c6682f60 9, 15 0, L_00000241c6668d00; 1 drivers
v00000241c6682f60_10 .net v00000241c6682f60 10, 15 0, L_00000241c6668750; 1 drivers
v00000241c6682f60_11 .net v00000241c6682f60 11, 15 0, L_00000241c66689f0; 1 drivers
v00000241c6682f60_12 .net v00000241c6682f60 12, 15 0, L_00000241c66687c0; 1 drivers
v00000241c6682f60_13 .net v00000241c6682f60 13, 15 0, L_00000241c6668de0; 1 drivers
v00000241c6682f60_14 .net v00000241c6682f60 14, 15 0, L_00000241c661d520; 1 drivers
v00000241c6682f60_15 .net v00000241c6682f60 15, 15 0, L_00000241c661d750; 1 drivers
v00000241c6681340_0 .var "reset_n", 0 0;
v00000241c6681480_0 .var "start", 0 0;
v00000241c66827e0_0 .var "valid_n", 0 0;
E_00000241c665f4a0 .event posedge, v00000241c6648260_0;
L_00000241c6681980 .array/port v00000241c6682100, v00000241c6682380_0;
S_00000241c6663930 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 3 42, 3 42 0, S_00000241c65f0b80;
.timescale 0 0;
v00000241c6648120_0 .var/2s "i", 31 0;
S_00000241c6663ac0 .scope module, "cpu" "router" 3 51, 3 391 0, S_00000241c65f0b80;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset_n";
.port_info 2 /INPUT 16 "instruction";
.port_info 3 /INPUT 1 "valid_n";
.port_info 4 /INPUT 1 "start";
.port_info 5 /OUTPUT 256 "register_file_out";
.port_info 6 /OUTPUT 1 "valido_n";
.port_info 7 /OUTPUT 1 "finished_o2";
.port_info 8 /OUTPUT 1 "start_o";
L_00000241c6668440 .functor BUFZ 1, v00000241c66827e0_0, C4<0>, C4<0>, C4<0>;
L_00000241c6668f30 .functor BUFZ 1, v00000241c6681480_0, C4<0>, C4<0>, C4<0>;
v00000241c667d7b0_0 .net "ALUsrc", 0 0, v00000241c667c1a0_0; 1 drivers
v00000241c667e1b0_0 .net "ALUsrc_f_if", 0 0, v00000241c66483a0_0; 1 drivers
v00000241c667dad0_0 .net "MemtoReg", 0 0, v00000241c667a760_0; 1 drivers
v00000241c667d3f0_0 .var "STALL", 0 0;
v00000241c667d8f0_0 .var "STALL_FELL", 0 0;
v00000241c667cdb0_0 .net *"_ivl_11", 0 0, L_00000241c6682ec0; 1 drivers
v00000241c667d530_0 .net *"_ivl_15", 0 0, L_00000241c6682420; 1 drivers
v00000241c667d210_0 .net *"_ivl_17", 0 0, L_00000241c6682a60; 1 drivers
v00000241c667d0d0_0 .net *"_ivl_19", 0 0, L_00000241c6681b60; 1 drivers
v00000241c667d670_0 .net *"_ivl_21", 0 0, L_00000241c66831e0; 1 drivers
v00000241c667cc70_0 .net *"_ivl_25", 0 0, L_00000241c6682920; 1 drivers
v00000241c667d2b0_0 .net *"_ivl_27", 0 0, L_00000241c6682b00; 1 drivers
v00000241c667de90_0 .net *"_ivl_29", 0 0, L_00000241c6681700; 1 drivers
v00000241c667c770_0 .net *"_ivl_31", 0 0, L_00000241c6682ba0; 1 drivers
v00000241c667dd50_0 .net *"_ivl_35", 0 0, L_00000241c6682c40; 1 drivers
v00000241c667d350_0 .net *"_ivl_37", 0 0, L_00000241c6682ce0; 1 drivers
v00000241c667ca90_0 .net *"_ivl_39", 0 0, L_00000241c6681840; 1 drivers
v00000241c667d990_0 .net *"_ivl_41", 0 0, L_00000241c6682060; 1 drivers
v00000241c667dfd0_0 .net *"_ivl_49", 0 0, L_00000241c66815c0; 1 drivers
v00000241c667e110_0 .net *"_ivl_5", 0 0, L_00000241c6681520; 1 drivers
v00000241c667ddf0_0 .net *"_ivl_51", 0 0, L_00000241c6681c00; 1 drivers
v00000241c667df30_0 .net *"_ivl_52", 15 0, L_00000241c66830a0; 1 drivers
v00000241c667c630_0 .net *"_ivl_59", 0 0, L_00000241c6681a20; 1 drivers
v00000241c667c310_0 .net *"_ivl_61", 0 0, L_00000241c6682240; 1 drivers
v00000241c667c810_0 .net *"_ivl_63", 0 0, L_00000241c6681ac0; 1 drivers
v00000241c667cb30_0 .net *"_ivl_64", 15 0, L_00000241c6682560; 1 drivers
L_00000241c67a4438 .functor BUFT 1, C4<000000000000>, C4<0>, C4<0>, C4<0>;
v00000241c667c950_0 .net *"_ivl_67", 11 0, L_00000241c67a4438; 1 drivers
v00000241c667cef0_0 .net *"_ivl_68", 15 0, L_00000241c6681ca0; 1 drivers
v00000241c667c3b0_0 .net *"_ivl_7", 0 0, L_00000241c6681e80; 1 drivers
v00000241c667c9f0_0 .net *"_ivl_70", 15 0, L_00000241c67fd300; 1 drivers
v00000241c667cbd0_0 .net *"_ivl_9", 0 0, L_00000241c6682600; 1 drivers
v00000241c667c450_0 .net/s "alu_mux_rs1_input", 15 0, L_00000241c66817a0; 1 drivers
v00000241c667c4f0_0 .net "alu_mux_rs1_select", 1 0, L_00000241c6683000; 1 drivers
v00000241c667cf90_0 .net/s "alu_mux_rs2_input", 15 0, L_00000241c67fe2a0; 1 drivers
v00000241c667ce50_0 .net "alu_mux_rs2_select", 2 0, L_00000241c66818e0; 1 drivers
v00000241c667f330_0 .net/s "alu_out", 15 0, v00000241c66486c0_0; 1 drivers
v00000241c6680370_0 .net/s "alu_out_f_mem", 15 0, v00000241c667c100_0; 1 drivers
v00000241c6680050_0 .net "clk", 0 0, v00000241c6682880_0; 1 drivers
v00000241c66811d0_0 .net/s "data_f_alu_rd", 15 0, v00000241c66481c0_0; 1 drivers
v00000241c6680b90_0 .net/s "data_f_alu_rs1", 15 0, v00000241c66475e0_0; 1 drivers
v00000241c6680eb0_0 .net/s "data_f_mem", 15 0, v00000241c667b020_0; 1 drivers
v00000241c66800f0_0 .net/s "data_f_mem_pc", 0 15, L_00000241c6668980; 1 drivers
v00000241c667f6f0_0 .net/s "data_f_rf_rd", 15 0, v00000241c667d170_0; 1 drivers
v00000241c6680190_0 .net/s "data_f_rf_rs1", 15 0, v00000241c667cd10_0; 1 drivers
v00000241c6680c30_0 .net/s "data_f_rf_rs2", 15 0, v00000241c667d490_0; 1 drivers
v00000241c6680f50_0 .net "finished_internal", 0 0, v00000241c66477c0_0; 1 drivers
v00000241c6680ff0_0 .var "finished_o2", 0 0;
v00000241c667f650_0 .net "first_bits", 3 0, L_00000241c66826a0; 1 drivers
v00000241c66807d0_0 .net "forward_disable", 0 0, v00000241c6647a40_0; 1 drivers
v00000241c667f3d0_0 .var "forward_enable_rs1_EX_ID", 0 0;
v00000241c667f970_0 .var "forward_enable_rs1_MEM_ID", 0 0;
v00000241c667fb50_0 .var "forward_enable_rs2_EX_ID", 0 0;
v00000241c6680cd0_0 .var "forward_enable_rs2_MEM_ID", 0 0;
v00000241c66804b0_0 .net "fourth_bits", 3 0, L_00000241c6682d80; 1 drivers
v00000241c667f470_0 .net "instruction", 15 0, L_00000241c6668c20; alias, 1 drivers
v00000241c6681090_0 .net "is_immed_f_if", 0 0, v00000241c6648080_0; 1 drivers
v00000241c6680d70_0 .net "is_immed_f_rf", 0 0, v00000241c667ae40_0; 1 drivers
v00000241c667f510_0 .net "is_jump_f_if", 0 0, v00000241c6647c20_0; 1 drivers
v00000241c667fe70_0 .net "is_jump_f_rf", 0 0, v00000241c667aee0_0; 1 drivers
v00000241c667f5b0_0 .net "mem_write_enable_f_alu", 0 0, v00000241c66484e0_0; 1 drivers
v00000241c6680870_0 .net "mem_write_enable_f_if", 0 0, v00000241c6647cc0_0; 1 drivers
v00000241c6680e10_0 .net "mem_write_enable_f_rf", 0 0, v00000241c667b3e0_0; 1 drivers
v00000241c667f8d0_0 .net "opcode_f_alu", 3 0, v00000241c6647d60_0; 1 drivers
v00000241c6681130_0 .net "opcode_f_if", 3 0, v00000241c6647ea0_0; 1 drivers
v00000241c66805f0_0 .net "opcode_f_rf", 3 0, v00000241c667a8a0_0; 1 drivers
v00000241c667fa10_0 .var "pc", 7 0;
v00000241c667f790_0 .net "pc_f_alu", 7 0, v00000241c6646fa0_0; 1 drivers
v00000241c6680af0_0 .net "pc_f_if", 7 0, v00000241c6647f40_0; 1 drivers
v00000241c667f830_0 .net "pc_f_mem", 7 0, v00000241c667aa80_0; 1 drivers
v00000241c667fab0_0 .net "pc_f_rf", 7 0, v00000241c667b520_0; 1 drivers
v00000241c667fbf0_0 .net "rd_f_alu", 3 0, v00000241c66488a0_0; 1 drivers
v00000241c6680410_0 .net "rd_f_if", 3 0, v00000241c6648580_0; 1 drivers
v00000241c667fc90_0 .net "rd_f_mem", 3 0, v00000241c667b7a0_0; 1 drivers
v00000241c667fd30_0 .net "rd_f_rf", 3 0, v00000241c667e070_0; 1 drivers
v00000241c667fdd0_0 .net "reg_write_enable_f_alu", 0 0, v00000241c6646d20_0; 1 drivers
v00000241c667ff10_0 .net "reg_write_enable_f_if", 0 0, v00000241c6648620_0; 1 drivers
v00000241c667ffb0_0 .net "reg_write_enable_f_mem", 0 0, v00000241c667ad00_0; 1 drivers
v00000241c6680230_0 .net "reg_write_enable_f_rf", 0 0, v00000241c667d850_0; 1 drivers
v00000241c66802d0 .array "register_file_out", 0 15;
v00000241c66802d0_0 .net v00000241c66802d0 0, 15 0, v00000241c667bca0_0; 1 drivers
v00000241c66802d0_1 .net v00000241c66802d0 1, 15 0, v00000241c667bca0_1; 1 drivers
v00000241c66802d0_2 .net v00000241c66802d0 2, 15 0, v00000241c667bca0_2; 1 drivers
v00000241c66802d0_3 .net v00000241c66802d0 3, 15 0, v00000241c667bca0_3; 1 drivers
v00000241c66802d0_4 .net v00000241c66802d0 4, 15 0, v00000241c667bca0_4; 1 drivers
v00000241c66802d0_5 .net v00000241c66802d0 5, 15 0, v00000241c667bca0_5; 1 drivers
v00000241c66802d0_6 .net v00000241c66802d0 6, 15 0, v00000241c667bca0_6; 1 drivers
v00000241c66802d0_7 .net v00000241c66802d0 7, 15 0, v00000241c667bca0_7; 1 drivers
v00000241c66802d0_8 .net v00000241c66802d0 8, 15 0, v00000241c667bca0_8; 1 drivers
v00000241c66802d0_9 .net v00000241c66802d0 9, 15 0, v00000241c667bca0_9; 1 drivers
v00000241c66802d0_10 .net v00000241c66802d0 10, 15 0, v00000241c667bca0_10; 1 drivers
v00000241c66802d0_11 .net v00000241c66802d0 11, 15 0, v00000241c667bca0_11; 1 drivers
v00000241c66802d0_12 .net v00000241c66802d0 12, 15 0, v00000241c667bca0_12; 1 drivers
v00000241c66802d0_13 .net v00000241c66802d0 13, 15 0, v00000241c667bca0_13; 1 drivers
v00000241c66802d0_14 .net v00000241c66802d0 14, 15 0, v00000241c667bca0_14; 1 drivers
v00000241c66802d0_15 .net v00000241c66802d0 15, 15 0, v00000241c667bca0_15; 1 drivers
v00000241c6680550_0 .net "reset_n", 0 0, v00000241c6681340_0; 1 drivers
v00000241c6680690_0 .net/s "rf_mux_write_input_data", 15 0, L_00000241c66824c0; 1 drivers
v00000241c6680a50_0 .net "rs1_f_if", 3 0, v00000241c6648940_0; 1 drivers
v00000241c6680730_0 .net "rs1_f_rf", 3 0, v00000241c667dcb0_0; 1 drivers
v00000241c6680910_0 .net "rs2_f_if", 3 0, v00000241c667b2a0_0; 1 drivers
v00000241c66809b0_0 .net "rs2_f_rf", 3 0, v00000241c667db70_0; 1 drivers
v00000241c66822e0_0 .net "second_bits", 3 0, L_00000241c66821a0; 1 drivers
v00000241c6683140_0 .net "start", 0 0, v00000241c6681480_0; 1 drivers
v00000241c6682740_0 .net "start_o", 0 0, L_00000241c6668f30; 1 drivers
v00000241c66813e0_0 .var "terminate_in_5", 15 0;
v00000241c6681d40_0 .net "third_bits", 3 0, L_00000241c6681660; 1 drivers
v00000241c66829c0_0 .net "valid_n", 0 0, v00000241c66827e0_0; 1 drivers
v00000241c6682e20_0 .net "valido_n", 0 0, L_00000241c6668440; 1 drivers
E_00000241c665fca0 .event anyedge, v00000241c6647d60_0, v00000241c66488a0_0, v00000241c667dcb0_0, v00000241c66470e0_0;
L_00000241c6681520 .part L_00000241c6668980, 15, 1;
L_00000241c6681e80 .part L_00000241c6668980, 14, 1;
L_00000241c6682600 .part L_00000241c6668980, 13, 1;
L_00000241c6682ec0 .part L_00000241c6668980, 12, 1;
L_00000241c66826a0 .concat [ 1 1 1 1], L_00000241c6682ec0, L_00000241c6682600, L_00000241c6681e80, L_00000241c6681520;
L_00000241c6682420 .part L_00000241c6668980, 11, 1;
L_00000241c6682a60 .part L_00000241c6668980, 10, 1;
L_00000241c6681b60 .part L_00000241c6668980, 9, 1;
L_00000241c66831e0 .part L_00000241c6668980, 8, 1;
L_00000241c66821a0 .concat [ 1 1 1 1], L_00000241c66831e0, L_00000241c6681b60, L_00000241c6682a60, L_00000241c6682420;
L_00000241c6682920 .part L_00000241c6668980, 7, 1;
L_00000241c6682b00 .part L_00000241c6668980, 6, 1;
L_00000241c6681700 .part L_00000241c6668980, 5, 1;
L_00000241c6682ba0 .part L_00000241c6668980, 4, 1;
L_00000241c6681660 .concat [ 1 1 1 1], L_00000241c6682ba0, L_00000241c6681700, L_00000241c6682b00, L_00000241c6682920;
L_00000241c6682c40 .part L_00000241c6668980, 3, 1;
L_00000241c6682ce0 .part L_00000241c6668980, 2, 1;
L_00000241c6681840 .part L_00000241c6668980, 1, 1;
L_00000241c6682060 .part L_00000241c6668980, 0, 1;
L_00000241c6682d80 .concat [ 1 1 1 1], L_00000241c6682060, L_00000241c6681840, L_00000241c6682ce0, L_00000241c6682c40;
L_00000241c66824c0 .functor MUXZ 16, v00000241c667c100_0, v00000241c667b020_0, v00000241c667a760_0, C4<>;
L_00000241c6683000 .concat [ 1 1 0 0], v00000241c667f970_0, v00000241c667f3d0_0;
L_00000241c66815c0 .part L_00000241c6683000, 1, 1;
L_00000241c6681c00 .part L_00000241c6683000, 0, 1;
L_00000241c66830a0 .functor MUXZ 16, v00000241c667cd10_0, v00000241c667c100_0, L_00000241c6681c00, C4<>;
L_00000241c66817a0 .functor MUXZ 16, L_00000241c66830a0, v00000241c66486c0_0, L_00000241c66815c0, C4<>;
L_00000241c66818e0 .concat [ 1 1 1 0], v00000241c667c1a0_0, v00000241c6680cd0_0, v00000241c667fb50_0;
L_00000241c6681a20 .part L_00000241c66818e0, 2, 1;
L_00000241c6682240 .part L_00000241c66818e0, 1, 1;
L_00000241c6681ac0 .part L_00000241c66818e0, 0, 1;
L_00000241c6682560 .concat [ 4 12 0 0], v00000241c667db70_0, L_00000241c67a4438;
L_00000241c6681ca0 .functor MUXZ 16, v00000241c667d490_0, L_00000241c6682560, L_00000241c6681ac0, C4<>;
L_00000241c67fd300 .functor MUXZ 16, L_00000241c6681ca0, v00000241c667c100_0, L_00000241c6682240, C4<>;
L_00000241c67fe2a0 .functor MUXZ 16, L_00000241c67fd300, v00000241c66486c0_0, L_00000241c6681a20, C4<>;
S_00000241c65e9890 .scope module, "alu" "ALU" 3 526, 3 252 0, S_00000241c6663ac0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset_n";
.port_info 2 /INPUT 1 "reg_write_enable_f_rf";
.port_info 3 /INPUT 1 "mem_write_enable_f_rf";
.port_info 4 /INPUT 1 "is_jump_f_rf";
.port_info 5 /INPUT 8 "pc_f_rf";
.port_info 6 /OUTPUT 8 "pc_f_alu";
.port_info 7 /INPUT 4 "opcode_f_rf";
.port_info 8 /INPUT 4 "rs2_f_rf";
.port_info 9 /INPUT 4 "rd_f_rf";
.port_info 10 /OUTPUT 4 "opcode_f_alu";
.port_info 11 /OUTPUT 4 "rd_f_alu";
.port_info 12 /OUTPUT 1 "reg_write_enable_f_alu";
.port_info 13 /OUTPUT 1 "mem_write_enable_f_alu";
.port_info 14 /INPUT 16 "alu_input_rs1";
.port_info 15 /INPUT 16 "alu_input_rs2";
.port_info 16 /INPUT 16 "alu_input_rd";
.port_info 17 /OUTPUT 16 "alu_out";
.port_info 18 /OUTPUT 16 "data_f_alu_rs1";
.port_info 19 /OUTPUT 16 "data_f_alu_rd";
.port_info 20 /INPUT 1 "STALL";
.port_info 21 /INPUT 1 "STALL_FELL";
.port_info 22 /INPUT 1 "start";
v00000241c6646be0_0 .net "STALL", 0 0, v00000241c667d3f0_0; 1 drivers
v00000241c6647fe0_0 .net "STALL_FELL", 0 0, v00000241c667d8f0_0; 1 drivers
v00000241c66489e0_0 .net "alu_input_rd", 15 0, v00000241c667d170_0; alias, 1 drivers
v00000241c6648a80_0 .net "alu_input_rs1", 15 0, L_00000241c66817a0; alias, 1 drivers
v00000241c6647180_0 .net "alu_input_rs2", 15 0, L_00000241c67fe2a0; alias, 1 drivers
v00000241c66486c0_0 .var "alu_out", 15 0;
v00000241c6648260_0 .net "clk", 0 0, v00000241c6682880_0; alias, 1 drivers
v00000241c66481c0_0 .var "data_f_alu_rd", 15 0;
v00000241c66475e0_0 .var "data_f_alu_rs1", 15 0;
v00000241c6647b80_0 .net "is_jump_f_rf", 0 0, v00000241c667aee0_0; alias, 1 drivers
v00000241c66484e0_0 .var "mem_write_enable_f_alu", 0 0;
v00000241c66472c0_0 .net "mem_write_enable_f_rf", 0 0, v00000241c667b3e0_0; alias, 1 drivers
v00000241c6647d60_0 .var "opcode_f_alu", 3 0;
v00000241c6647860_0 .net "opcode_f_rf", 3 0, v00000241c667a8a0_0; alias, 1 drivers
v00000241c6646fa0_0 .var "pc_f_alu", 7 0;
v00000241c6647680_0 .net "pc_f_rf", 7 0, v00000241c667b520_0; alias, 1 drivers
v00000241c66488a0_0 .var "rd_f_alu", 3 0;
v00000241c6647360_0 .net "rd_f_rf", 3 0, v00000241c667e070_0; alias, 1 drivers
v00000241c6646d20_0 .var "reg_write_enable_f_alu", 0 0;
v00000241c6647900_0 .net "reg_write_enable_f_rf", 0 0, v00000241c667d850_0; alias, 1 drivers
v00000241c6647040_0 .net "reset_n", 0 0, v00000241c6681340_0; alias, 1 drivers
v00000241c66470e0_0 .net "rs2_f_rf", 3 0, v00000241c667db70_0; alias, 1 drivers
v00000241c6646dc0_0 .net "start", 0 0, v00000241c6681480_0; alias, 1 drivers
E_00000241c665f1a0/0 .event negedge, v00000241c6647040_0;
E_00000241c665f1a0/1 .event posedge, v00000241c6648260_0;
E_00000241c665f1a0 .event/or E_00000241c665f1a0/0, E_00000241c665f1a0/1;
S_00000241c65e9ba0 .scope module, "instr_fetch" "IF" 3 466, 3 67 0, S_00000241c6663ac0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset_n";
.port_info 2 /INPUT 8 "pc";
.port_info 3 /INPUT 4 "first_bits";
.port_info 4 /INPUT 4 "second_bits";
.port_info 5 /INPUT 4 "third_bits";
.port_info 6 /INPUT 4 "fourth_bits";
.port_info 7 /OUTPUT 8 "pc_f_if";
.port_info 8 /OUTPUT 4 "opcode_f_if";
.port_info 9 /OUTPUT 4 "rs1_f_if";
.port_info 10 /OUTPUT 4 "rs2_f_if";
.port_info 11 /OUTPUT 4 "rd_f_if";
.port_info 12 /OUTPUT 1 "ALUsrc_f_if";
.port_info 13 /OUTPUT 1 "reg_write_enable_f_if";
.port_info 14 /OUTPUT 1 "mem_write_enable_f_if";
.port_info 15 /OUTPUT 1 "is_immed_f_if";
.port_info 16 /OUTPUT 1 "is_jump_f_if";
.port_info 17 /INPUT 1 "STALL";
.port_info 18 /OUTPUT 1 "finished";
.port_info 19 /OUTPUT 1 "forward_disable";
.port_info 20 /INPUT 1 "start";
v00000241c66483a0_0 .var "ALUsrc_f_if", 0 0;
v00000241c6648440_0 .net "STALL", 0 0, v00000241c667d3f0_0; alias, 1 drivers
v00000241c6647400_0 .net "clk", 0 0, v00000241c6682880_0; alias, 1 drivers
v00000241c66477c0_0 .var "finished", 0 0;
v00000241c66479a0_0 .net "first_bits", 3 0, L_00000241c66826a0; alias, 1 drivers
v00000241c6647a40_0 .var "forward_disable", 0 0;
v00000241c6647ae0_0 .net "fourth_bits", 3 0, L_00000241c6682d80; alias, 1 drivers
v00000241c6648080_0 .var "is_immed_f_if", 0 0;
v00000241c6647c20_0 .var "is_jump_f_if", 0 0;
v00000241c6647cc0_0 .var "mem_write_enable_f_if", 0 0;
v00000241c6647ea0_0 .var "opcode_f_if", 3 0;
v00000241c6647e00_0 .net "pc", 7 0, v00000241c667fa10_0; 1 drivers
v00000241c6647f40_0 .var "pc_f_if", 7 0;
v00000241c6648580_0 .var "rd_f_if", 3 0;
v00000241c6648620_0 .var "reg_write_enable_f_if", 0 0;
v00000241c6648760_0 .net "reset_n", 0 0, v00000241c6681340_0; alias, 1 drivers
v00000241c6648940_0 .var "rs1_f_if", 3 0;
v00000241c667b2a0_0 .var "rs2_f_if", 3 0;
v00000241c667b160_0 .net "second_bits", 3 0, L_00000241c66821a0; alias, 1 drivers
v00000241c667c060_0 .net "start", 0 0, v00000241c6681480_0; alias, 1 drivers
v00000241c667a9e0_0 .net "third_bits", 3 0, L_00000241c6681660; alias, 1 drivers
S_00000241c6605e50 .scope module, "memory2" "MEM" 3 553, 3 321 0, S_00000241c6663ac0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset_n";
.port_info 2 /INPUT 16 "addr";
.port_info 3 /INPUT 16 "data_in";
.port_info 4 /INPUT 1 "write_enable";
.port_info 5 /INPUT 8 "pc_f_alu";
.port_info 6 /INPUT 8 "pc";
.port_info 7 /OUTPUT 8 "pc_f_mem";
.port_info 8 /OUTPUT 16 "data_out";
.port_info 9 /OUTPUT 16 "data_out_pc";
.port_info 10 /INPUT 1 "reg_write_enable_f_alu";
.port_info 11 /INPUT 4 "rd_f_alu";
.port_info 12 /OUTPUT 4 "rd_f_mem";
.port_info 13 /OUTPUT 1 "reg_write_enable_f_mem";
.port_info 14 /INPUT 16 "alu_out";
.port_info 15 /OUTPUT 16 "alu_out_f_mem";
.port_info 16 /INPUT 4 "opcode_f_alu";
.port_info 17 /OUTPUT 1 "MemtoReg";
.port_info 18 /INPUT 16 "instruction";
.port_info 19 /INPUT 1 "valid_n";
.port_info 20 /INPUT 1 "start";
L_00000241c6668980 .functor BUFZ 16, L_00000241c67fce00, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v00000241c667a760_0 .var "MemtoReg", 0 0;
v00000241c667bb60_0 .net *"_ivl_0", 15 0, L_00000241c67fce00; 1 drivers
v00000241c667a440_0 .net *"_ivl_2", 9 0, L_00000241c67fd260; 1 drivers
L_00000241c67a4480 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v00000241c667b660_0 .net *"_ivl_5", 1 0, L_00000241c67a4480; 1 drivers
v00000241c667be80_0 .net "addr", 15 0, v00000241c66486c0_0; alias, 1 drivers
v00000241c667a940_0 .net "alu_out", 15 0, v00000241c66486c0_0; alias, 1 drivers
v00000241c667c100_0 .var "alu_out_f_mem", 15 0;
v00000241c667bac0_0 .net "clk", 0 0, v00000241c6682880_0; alias, 1 drivers
v00000241c667a3a0_0 .net "data_in", 15 0, v00000241c66481c0_0; alias, 1 drivers
v00000241c667b020_0 .var "data_out", 15 0;
v00000241c667a620_0 .net "data_out_pc", 15 0, L_00000241c6668980; alias, 1 drivers
v00000241c667b0c0_0 .net "instruction", 15 0, L_00000241c6668c20; alias, 1 drivers
v00000241c667bc00_0 .var "instruction_counter", 7 0;
v00000241c667bde0 .array "instructions", 256 0, 15 0;
v00000241c667bf20 .array "memory", 1024 0, 15 0;
v00000241c667a580_0 .net "opcode_f_alu", 3 0, v00000241c6647d60_0; alias, 1 drivers
v00000241c667b700_0 .net "pc", 7 0, v00000241c667fa10_0; alias, 1 drivers
v00000241c667b340_0 .net "pc_f_alu", 7 0, v00000241c6646fa0_0; alias, 1 drivers
v00000241c667aa80_0 .var "pc_f_mem", 7 0;
v00000241c667b840_0 .net "rd_f_alu", 3 0, v00000241c66488a0_0; alias, 1 drivers
v00000241c667b7a0_0 .var "rd_f_mem", 3 0;
v00000241c667ada0_0 .net "reg_write_enable_f_alu", 0 0, v00000241c6646d20_0; alias, 1 drivers
v00000241c667ad00_0 .var "reg_write_enable_f_mem", 0 0;
v00000241c667ab20_0 .net "reset_n", 0 0, v00000241c6681340_0; alias, 1 drivers
v00000241c667b200_0 .net "start", 0 0, v00000241c6681480_0; alias, 1 drivers
v00000241c667bfc0_0 .net "valid_n", 0 0, v00000241c66827e0_0; alias, 1 drivers
v00000241c667b8e0_0 .net "write_enable", 0 0, v00000241c66484e0_0; alias, 1 drivers
L_00000241c67fce00 .array/port v00000241c667bde0, L_00000241c67fd260;
L_00000241c67fd260 .concat [ 8 2 0 0], v00000241c667fa10_0, L_00000241c67a4480;
S_00000241c65dc400 .scope module, "register_file2" "RF2" 3 489, 3 159 0, S_00000241c6663ac0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset_n";
.port_info 2 /INPUT 8 "pc_f_if";
.port_info 3 /OUTPUT 8 "pc_f_rf";
.port_info 4 /INPUT 1 "reg_write_enable_f_if";
.port_info 5 /INPUT 1 "mem_write_enable_f_if";
.port_info 6 /INPUT 1 "is_immed_f_if";
.port_info 7 /INPUT 1 "ALUsrc_f_if";
.port_info 8 /INPUT 1 "is_jump_f_if";
.port_info 9 /INPUT 1 "reg_write_enable_f_mem";
.port_info 10 /OUTPUT 1 "reg_write_enable_f_rf";
.port_info 11 /OUTPUT 1 "mem_write_enable_f_rf";
.port_info 12 /OUTPUT 1 "is_immed_f_rf";
.port_info 13 /OUTPUT 1 "ALUsrc_f_rf";
.port_info 14 /OUTPUT 1 "is_jump_f_rf";
.port_info 15 /INPUT 4 "opcode_f_if";
.port_info 16 /INPUT 4 "rs1_f_if";
.port_info 17 /INPUT 4 "rs2_f_if";
.port_info 18 /INPUT 4 "rd_f_if";
.port_info 19 /OUTPUT 4 "opcode_f_rf";
.port_info 20 /OUTPUT 4 "rs1_f_rf";
.port_info 21 /OUTPUT 4 "rs2_f_rf";
.port_info 22 /OUTPUT 4 "rd_f_rf";
.port_info 23 /INPUT 4 "if_request_out_1";
.port_info 24 /INPUT 4 "if_request_out_2";
.port_info 25 /INPUT 4 "waddr";
.port_info 26 /INPUT 16 "rf_write_input_data";
.port_info 27 /OUTPUT 16 "rf_data_1";
.port_info 28 /OUTPUT 16 "rf_data_2";
.port_info 29 /OUTPUT 16 "rf_data_rd";
.port_info 30 /INPUT 1 "STALL";
.port_info 31 /INPUT 1 "STALL_FELL";
.port_info 32 /INPUT 1 "start";
.port_info 33 /OUTPUT 256 "datastorage";
v00000241c667b980_0 .net "ALUsrc_f_if", 0 0, v00000241c66483a0_0; alias, 1 drivers
v00000241c667c1a0_0 .var "ALUsrc_f_rf", 0 0;
v00000241c667abc0_0 .net "STALL", 0 0, v00000241c667d3f0_0; alias, 1 drivers
v00000241c667a300_0 .net "STALL_FELL", 0 0, v00000241c667d8f0_0; alias, 1 drivers
v00000241c667ba20_0 .net "clk", 0 0, v00000241c6682880_0; alias, 1 drivers
v00000241c667bca0 .array "datastorage", 0 15, 15 0;
v00000241c667a6c0_0 .net "if_request_out_1", 3 0, v00000241c6648940_0; alias, 1 drivers
v00000241c667ac60_0 .net "if_request_out_2", 3 0, v00000241c667b2a0_0; alias, 1 drivers
v00000241c667a4e0_0 .net "is_immed_f_if", 0 0, v00000241c6648080_0; alias, 1 drivers
v00000241c667ae40_0 .var "is_immed_f_rf", 0 0;
v00000241c667a800_0 .net "is_jump_f_if", 0 0, v00000241c6647c20_0; alias, 1 drivers
v00000241c667aee0_0 .var "is_jump_f_rf", 0 0;
v00000241c667af80_0 .net "mem_write_enable_f_if", 0 0, v00000241c6647cc0_0; alias, 1 drivers
v00000241c667b3e0_0 .var "mem_write_enable_f_rf", 0 0;
v00000241c667b480_0 .net "opcode_f_if", 3 0, v00000241c6647ea0_0; alias, 1 drivers
v00000241c667a8a0_0 .var "opcode_f_rf", 3 0;
v00000241c667bd40_0 .net "pc_f_if", 7 0, v00000241c6647f40_0; alias, 1 drivers
v00000241c667b520_0 .var "pc_f_rf", 7 0;
v00000241c667b5c0_0 .net "rd_f_if", 3 0, v00000241c6648580_0; alias, 1 drivers
v00000241c667e070_0 .var "rd_f_rf", 3 0;
v00000241c667da30_0 .net "reg_write_enable_f_if", 0 0, v00000241c6648620_0; alias, 1 drivers
v00000241c667d5d0_0 .net "reg_write_enable_f_mem", 0 0, v00000241c667ad00_0; alias, 1 drivers
v00000241c667d850_0 .var "reg_write_enable_f_rf", 0 0;
v00000241c667c590_0 .net "reset_n", 0 0, v00000241c6681340_0; alias, 1 drivers
v00000241c667cd10_0 .var "rf_data_1", 15 0;
v00000241c667d490_0 .var "rf_data_2", 15 0;
v00000241c667d170_0 .var "rf_data_rd", 15 0;
v00000241c667d030_0 .net "rf_write_input_data", 15 0, L_00000241c66824c0; alias, 1 drivers
v00000241c667dc10_0 .net "rs1_f_if", 3 0, v00000241c6648940_0; alias, 1 drivers
v00000241c667dcb0_0 .var "rs1_f_rf", 3 0;
v00000241c667c8b0_0 .net "rs2_f_if", 3 0, v00000241c667b2a0_0; alias, 1 drivers
v00000241c667db70_0 .var "rs2_f_rf", 3 0;
v00000241c667d710_0 .net "start", 0 0, v00000241c6681480_0; alias, 1 drivers
v00000241c667c6d0_0 .net "waddr", 3 0, v00000241c667b7a0_0; alias, 1 drivers
.scope S_00000241c65e9ba0;
T_0 ;
%wait E_00000241c665f1a0;
%load/vec4 v00000241c6648760_0;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_0.0, 8;
%pushi/vec4 0, 0, 8;
%assign/vec4 v00000241c6647f40_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c66477c0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647a40_0, 0;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v00000241c667c060_0;
%flag_set/vec4 8;
%jmp/0xz T_0.2, 8;
%load/vec4 v00000241c66479a0_0;
%assign/vec4 v00000241c6647ea0_0, 0;
%load/vec4 v00000241c667b160_0;
%assign/vec4 v00000241c6648940_0, 0;
%load/vec4 v00000241c667a9e0_0;
%assign/vec4 v00000241c667b2a0_0, 0;
%load/vec4 v00000241c6647ae0_0;
%assign/vec4 v00000241c6648580_0, 0;
%load/vec4 v00000241c6647e00_0;
%addi 1, 0, 8;
%assign/vec4 v00000241c6647f40_0, 0;
%load/vec4 v00000241c6648440_0;
%flag_set/vec4 8;
%jmp/0xz T_0.4, 8;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6648080_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
%jmp T_0.5;
T_0.4 ;
%load/vec4 v00000241c66479a0_0;
%cmpi/e 0, 0, 4;
%jmp/0xz T_0.6, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648080_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
T_0.6 ;
%load/vec4 v00000241c66479a0_0;
%cmpi/e 8, 0, 4;
%jmp/0xz T_0.8, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648080_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
T_0.8 ;
%load/vec4 v00000241c66479a0_0;
%cmpi/e 4, 0, 4;
%jmp/0xz T_0.10, 4;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6648080_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
T_0.10 ;
%load/vec4 v00000241c66479a0_0;
%cmpi/e 5, 0, 4;
%jmp/0xz T_0.12, 4;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6648080_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
T_0.12 ;
%load/vec4 v00000241c66479a0_0;
%cmpi/e 1, 0, 4;
%jmp/0xz T_0.14, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6648080_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
T_0.14 ;
%load/vec4 v00000241c66479a0_0;
%cmpi/e 15, 0, 4;
%jmp/0xz T_0.16, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c66477c0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6647cc0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6648620_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c66483a0_0, 0;
T_0.16 ;
T_0.5 ;
T_0.2 ;
T_0.1 ;
%jmp T_0;
.thread T_0;
.scope S_00000241c65dc400;
T_1 ;
%wait E_00000241c665f1a0;
%load/vec4 v00000241c667c590_0;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_1.0, 8;
%pushi/vec4 50, 0, 16;
%ix/load 3, 0, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 200, 0, 16;
%ix/load 3, 1, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 300, 0, 16;
%ix/load 3, 2, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 400, 0, 16;
%ix/load 3, 3, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 500, 0, 16;
%ix/load 3, 4, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 600, 0, 16;
%ix/load 3, 5, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 700, 0, 16;
%ix/load 3, 6, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 800, 0, 16;
%ix/load 3, 7, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 900, 0, 16;
%ix/load 3, 8, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 950, 0, 16;
%ix/load 3, 9, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 960, 0, 16;
%ix/load 3, 10, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 970, 0, 16;
%ix/load 3, 11, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 980, 0, 16;
%ix/load 3, 12, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 990, 0, 16;
%ix/load 3, 13, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 991, 0, 16;
%ix/load 3, 14, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%pushi/vec4 992, 0, 16;
%ix/load 3, 15, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
%jmp T_1.1;
T_1.0 ;
%load/vec4 v00000241c667d710_0;
%flag_set/vec4 8;
%jmp/0xz T_1.2, 8;
%load/vec4 v00000241c667b480_0;
%assign/vec4 v00000241c667a8a0_0, 0;
%load/vec4 v00000241c667dc10_0;
%assign/vec4 v00000241c667dcb0_0, 0;
%load/vec4 v00000241c667c8b0_0;
%assign/vec4 v00000241c667db70_0, 0;
%load/vec4 v00000241c667b5c0_0;
%assign/vec4 v00000241c667e070_0, 0;
%load/vec4 v00000241c667b980_0;
%assign/vec4 v00000241c667c1a0_0, 0;
%load/vec4 v00000241c667bd40_0;
%assign/vec4 v00000241c667b520_0, 0;
%load/vec4 v00000241c667a6c0_0;
%pad/u 6;
%ix/vec4 4;
%load/vec4a v00000241c667bca0, 4;
%assign/vec4 v00000241c667cd10_0, 0;
%load/vec4 v00000241c667ac60_0;
%pad/u 6;
%ix/vec4 4;
%load/vec4a v00000241c667bca0, 4;
%assign/vec4 v00000241c667d490_0, 0;
%load/vec4 v00000241c667b5c0_0;
%pad/u 6;
%ix/vec4 4;
%load/vec4a v00000241c667bca0, 4;
%assign/vec4 v00000241c667d170_0, 0;
%load/vec4 v00000241c667abc0_0;
%flag_set/vec4 8;
%jmp/0xz T_1.4, 8;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667d850_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667b3e0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667ae40_0, 0;
%jmp T_1.5;
T_1.4 ;
%load/vec4 v00000241c667da30_0;
%assign/vec4 v00000241c667d850_0, 0;
%load/vec4 v00000241c667af80_0;
%assign/vec4 v00000241c667b3e0_0, 0;
%load/vec4 v00000241c667a4e0_0;
%assign/vec4 v00000241c667ae40_0, 0;
%load/vec4 v00000241c667d5d0_0;
%flag_set/vec4 8;
%jmp/0xz T_1.6, 8;
%load/vec4 v00000241c667d030_0;
%load/vec4 v00000241c667c6d0_0;
%pad/u 6;
%ix/vec4 3;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bca0, 0, 4;
T_1.6 ;
T_1.5 ;
T_1.2 ;
T_1.1 ;
%jmp T_1;
.thread T_1;
.scope S_00000241c65e9890;
T_2 ;
%wait E_00000241c665f1a0;
%load/vec4 v00000241c6647040_0;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_2.0, 8;
%pushi/vec4 0, 0, 8;
%assign/vec4 v00000241c6646fa0_0, 0;
%jmp T_2.1;
T_2.0 ;
%load/vec4 v00000241c6646dc0_0;
%flag_set/vec4 8;
%jmp/0xz T_2.2, 8;
%load/vec4 v00000241c6647900_0;
%assign/vec4 v00000241c6646d20_0, 0;
%load/vec4 v00000241c66472c0_0;
%assign/vec4 v00000241c66484e0_0, 0;
%load/vec4 v00000241c6647860_0;
%assign/vec4 v00000241c6647d60_0, 0;
%load/vec4 v00000241c6647360_0;
%assign/vec4 v00000241c66488a0_0, 0;
%load/vec4 v00000241c6648a80_0;
%assign/vec4 v00000241c66475e0_0, 0;
%load/vec4 v00000241c66489e0_0;
%assign/vec4 v00000241c66481c0_0, 0;
%vpi_call/w 3 282 "$display", "alu printing data_f_alu_rd", v00000241c66489e0_0 {0 0 0};
%load/vec4 v00000241c6647860_0;
%cmpi/e 4, 0, 4;
%jmp/0xz T_2.4, 4;
%load/vec4 v00000241c6648a80_0;
%load/vec4 v00000241c6647180_0;
%add;
%assign/vec4 v00000241c66486c0_0, 0;
%load/vec4 v00000241c6647680_0;
%assign/vec4 v00000241c6646fa0_0, 0;
T_2.4 ;
%load/vec4 v00000241c6647860_0;
%cmpi/e 0, 0, 4;
%jmp/0xz T_2.6, 4;
%load/vec4 v00000241c6648a80_0;
%load/vec4 v00000241c6647180_0;
%add;
%assign/vec4 v00000241c66486c0_0, 0;
%load/vec4 v00000241c6647680_0;
%assign/vec4 v00000241c6646fa0_0, 0;
T_2.6 ;
%load/vec4 v00000241c6647860_0;
%cmpi/e 1, 0, 4;
%jmp/0xz T_2.8, 4;
%load/vec4 v00000241c6648a80_0;
%load/vec4 v00000241c6647180_0;
%add;
%assign/vec4 v00000241c66486c0_0, 0;
%load/vec4 v00000241c6647680_0;
%assign/vec4 v00000241c6646fa0_0, 0;
T_2.8 ;
%load/vec4 v00000241c6647860_0;
%cmpi/e 4, 0, 4;
%jmp/0xz T_2.10, 4;
%load/vec4 v00000241c6648a80_0;
%load/vec4 v00000241c6647180_0;
%add;
%assign/vec4 v00000241c66486c0_0, 0;
%load/vec4 v00000241c6647680_0;
%assign/vec4 v00000241c6646fa0_0, 0;
T_2.10 ;
%load/vec4 v00000241c6647860_0;
%cmpi/e 5, 0, 4;
%jmp/0xz T_2.12, 4;
%load/vec4 v00000241c6648a80_0;
%load/vec4 v00000241c6647180_0;
%sub;
%assign/vec4 v00000241c66486c0_0, 0;
%load/vec4 v00000241c6647680_0;
%assign/vec4 v00000241c6646fa0_0, 0;
T_2.12 ;
%load/vec4 v00000241c6647860_0;
%cmpi/e 8, 0, 4;
%jmp/0xz T_2.14, 4;
%load/vec4 v00000241c6648a80_0;
%load/vec4 v00000241c6647180_0;
%add;
%assign/vec4 v00000241c66486c0_0, 0;
%load/vec4 v00000241c6647680_0;
%assign/vec4 v00000241c6646fa0_0, 0;
T_2.14 ;
T_2.2 ;
T_2.1 ;
%jmp T_2;
.thread T_2;
.scope S_00000241c6605e50;
T_3 ;
%wait E_00000241c665f1a0;
%load/vec4 v00000241c667ab20_0;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_3.0, 8;
%pushi/vec4 0, 0, 8;
%assign/vec4 v00000241c667bc00_0, 0;
%jmp T_3.1;
T_3.0 ;
%load/vec4 v00000241c667bfc0_0;
%flag_set/vec4 8;
%jmp/0xz T_3.2, 8;
%load/vec4 v00000241c667b0c0_0;
%load/vec4 v00000241c667bc00_0;
%pad/u 10;
%ix/vec4 3;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bde0, 0, 4;
; show_stmt_assign_vector: Get l-value for compressed += operand
%load/vec4 v00000241c667bc00_0;
%pushi/vec4 1, 0, 8;
%add;
%store/vec4 v00000241c667bc00_0, 0, 8;
%jmp T_3.3;
T_3.2 ;
%load/vec4 v00000241c667b200_0;
%flag_set/vec4 8;
%jmp/0xz T_3.4, 8;
%load/vec4 v00000241c667ada0_0;
%assign/vec4 v00000241c667ad00_0, 0;
%ix/getv 4, v00000241c667be80_0;
%load/vec4a v00000241c667bf20, 4;
%assign/vec4 v00000241c667b020_0, 0;
%load/vec4 v00000241c667b340_0;
%assign/vec4 v00000241c667aa80_0, 0;
%load/vec4 v00000241c667b840_0;
%assign/vec4 v00000241c667b7a0_0, 0;
%load/vec4 v00000241c667a940_0;
%assign/vec4 v00000241c667c100_0, 0;
%load/vec4 v00000241c667b8e0_0;
%flag_set/vec4 8;
%jmp/0xz T_3.6, 8;
%vpi_call/w 3 373 "$display", "data in is %h", v00000241c667a3a0_0 {0 0 0};
%load/vec4 v00000241c667a3a0_0;
%ix/getv 3, v00000241c667be80_0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v00000241c667bf20, 0, 4;
T_3.6 ;
%load/vec4 v00000241c667a580_0;
%cmpi/e 0, 0, 4;
%jmp/0xz T_3.8, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000241c667a760_0, 0;
%jmp T_3.9;
T_3.8 ;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667a760_0, 0;
T_3.9 ;
T_3.4 ;
T_3.3 ;
T_3.1 ;
%jmp T_3;
.thread T_3;
.scope S_00000241c6663ac0;
T_4 ;
%vpi_call/w 3 464 "$monitor", "PC: %d, rs1_f_if %d, rs2_f_if %d, rd_f_if %d, rs1_f_rf %d, rs2_f_rf %d, rd_f_rf %d, rd_f_alu %d, alu_out %d, rs1_on_alu %d, rs2_on_alu %d", v00000241c667fa10_0, v00000241c6680a50_0, v00000241c6680910_0, v00000241c6680410_0, v00000241c6680730_0, v00000241c66809b0_0, v00000241c667fd30_0, v00000241c667fbf0_0, v00000241c667f330_0, v00000241c667c450_0, v00000241c667cf90_0 {0 0 0};
%end;
.thread T_4;
.scope S_00000241c6663ac0;
T_5 ;
%wait E_00000241c665fca0;
%load/vec4 v00000241c667f8d0_0;
%pushi/vec4 0, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v00000241c667fbf0_0;
%load/vec4 v00000241c6680730_0;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v00000241c667fbf0_0;
%load/vec4 v00000241c66809b0_0;
%cmp/e;
%flag_get/vec4 4;
%or;
%and;
%flag_set/vec4 8;
%jmp/0xz T_5.0, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000241c667d3f0_0, 0, 1;
%vpi_call/w 3 583 "$display", "Stall activated" {0 0 0};
%jmp T_5.1;
T_5.0 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000241c667d3f0_0, 0, 1;
%vpi_call/w 3 586 "$display", "Stall deactivated" {0 0 0};
T_5.1 ;
%jmp T_5;
.thread T_5, $push;
.scope S_00000241c6663ac0;
T_6 ;
%wait E_00000241c665f1a0;
%load/vec4 v00000241c6680550_0;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_6.0, 8;
%pushi/vec4 0, 0, 8;
%assign/vec4 v00000241c667fa10_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667f3d0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667fb50_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667f970_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6680cd0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667d3f0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6680ff0_0, 0;
%pushi/vec4 0, 0, 16;
%assign/vec4 v00000241c66813e0_0, 0;
%jmp T_6.1;
T_6.0 ;
%vpi_call/w 3 605 "$display", "Instruction is %b", v00000241c667f470_0 {0 0 0};
%load/vec4 v00000241c6683140_0;
%flag_set/vec4 8;
%jmp/0xz T_6.2, 8;
%load/vec4 v00000241c667d3f0_0;
%nor/r;
%load/vec4 v00000241c6680f50_0;
%nor/r;
%and;
%flag_set/vec4 8;
%jmp/0xz T_6.4, 8;
%load/vec4 v00000241c667fa10_0;
%addi 1, 0, 8;
%assign/vec4 v00000241c667fa10_0, 0;
T_6.4 ;
%load/vec4 v00000241c667f970_0;
%flag_set/vec4 8;
%jmp/0xz T_6.6, 8;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c667f970_0, 0;
T_6.6 ;
%load/vec4 v00000241c6680cd0_0;
%flag_set/vec4 8;
%jmp/0xz T_6.8, 8;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000241c6680cd0_0, 0;
T_6.8 ;
%load/vec4 v00000241c667f8d0_0;
%pushi/vec4 4, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v00000241c667f8d0_0;
%pushi/vec4 5, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v00000241c667f8d0_0;
%pushi/vec4 8, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v00000241c667f8d0_0;
%pushi/vec4 0, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v00000241c667f8d0_0;
%pushi/vec4 1, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v00000241c6681130_0;
%pushi/vec4 4, 0, 4;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v00000241c6681130_0;
%pushi/vec4 5, 0, 4;
%cmp/e;