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hugo-2.12-x86_64-fixes-backport.patch
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--- hugo-2.12/bios.c 2004-05-26 22:54:15.000000000 +0200
+++ hugo-2.13-pre/bios.c 2005-09-27 19:58:15.000000000 +0200
@@ -323,7 +323,7 @@
#endif
-void handle_bios(void)
+int handle_bios(void)
{
#ifdef CD_DEBUG
static int last_op = -1, last_ax = -1, last_bx = -1, last_cx = -1, last_dx = -1;
@@ -1093,4 +1093,5 @@
put_8bit_addr( (UInt16)(reg_pc), CDBIOS_replace[imm_operand( (UInt16)(reg_pc + 1))][0]);
put_8bit_addr( (UInt16)(reg_pc + 1), CDBIOS_replace[imm_operand( (UInt16)(reg_pc + 1))][1]);
}
+ return 0;
}
--- hugo-2.12/bios.h 2004-05-26 22:54:15.000000000 +0200
+++ hugo-2.13-pre/bios.h 2005-09-27 19:58:15.000000000 +0200
@@ -1,7 +1,7 @@
#ifndef INCLUDE_BIOS_H
#define INCLUDE_BIOS_H
-void handle_bios(void);
+int handle_bios(void);
/* Perform the bios hooking function */
#endif
--- hugo-2.12/hugo.6 1970-01-01 01:00:00.000000000 +0100
+++ hugo-2.13-pre/hugo.6 2009-01-13 14:33:38.000000000 +0200
@@ -0,0 +1,86 @@
+.TH Hu-Go! "6" "April 2005" "Hu-Go! 2.12" "Games"
+.SH NAME
+Hu-Go! \- manual page for Hu-Go! 2.12
+.SH SYNOPSIS
+.B hugo
+[\fIOPTION\fR...] \fI<rom filename> <BRAM filename>\fR
+.SH DESCRIPTION
+hugo \fB\-\-\fR a program to play pc engine games (roms, cds and various kind of
+dumps)
+.TP
+\fB\-a\fR, \fB\-\-aspect\-ratio[\fR=\fI0\fR/1]
+Keep aspect ratio of pc engine in fullscreen mode
+(default is 0)
+.TP
+\fB\-c\fR, \fB\-\-cd\-emulation=\fR<CD emulation level>
+CD emulation mode (default is 0, rom only)
+.TP
+\fB\-d\fR, \fB\-\-debug\-startup[\fR=\fI0\fR/1]
+Launch debugger on startup (default is 0)
+.TP
+\fB\-e\fR, \fB\-\-eagle[\fR=\fI0\fR/1]
+Use eagle mode for rendering, if available
+(default is 0)
+.TP
+\fB\-f\fR, \fB\-\-fullscreen[\fR=\fI0\fR/1]
+Start game in fullscreen (default is 0)
+.TP
+\fB\-i\fR, \fB\-\-cd\-device=\fR<CD device>
+CD device to use (if CD emulation mode = 1,
+default is /dev/cdrom)
+.TP
+\fB\-m\fR, \fB\-\-no\-bios\-hooking[\fR=\fI0\fR/1]
+No hard bios hooking (slower but more
+compatible, default is 0)
+.TP
+\fB\-n\fR, \fB\-\-netplay=\fR<server ip or hostname>
+Enable Netplay and set server name
+.TP
+\fB\-o\fR, \fB\-\-overlay[\fR=\fI0\fR/1]
+Use hardware scaling mode for rendering, if
+available (default is 0)
+.TP
+\fB\-s\fR, \fB\-\-stereo[\fR=\fI0\fR/1]
+Render sound in stereo (default is 0)
+.TP
+\fB\-S\fR, \fB\-\-scanline[\fR=\fI0\fR/1]
+Use scanline mode for rendering, if available
+(default is 0)
+.TP
+\fB\-t\fR, \fB\-\-tracks\-number=\fR<track number>
+Number of tracks when emulating a single iso
+(default is 22)
+.TP
+\fB\-u\fR, \fB\-\-us\-decryption[\fR=\fI0\fR/1]
+Decrypt roms using the US \-> JAP decryption
+algorythm (default is 0)
+.TP
+\fB\-w\fR, \fB\-\-window\-size=\fR<zoom factor>
+Zoom factor when in windowed mode (Between 1 and
+4, default is 1)
+.TP
+\-?, \fB\-\-help\fR
+Give this help list
+.TP
+\fB\-\-usage\fR
+Give a short usage message
+.TP
+\fB\-V\fR, \fB\-\-version\fR
+Print program version
+.PP
+Mandatory or optional arguments to long options are also mandatory or optional
+for any corresponding short options.
+.SH "REPORTING BUGS"
+Report bugs to <zeograd@zeograd.com>.
+.SH "SEE ALSO"
+The full documentation for
+.B Hu-Go!
+is maintained as a Texinfo manual. If the
+.B info
+and
+.B Hu-Go!
+programs are properly installed at your site, the command
+.IP
+.B info Hu-Go!
+.PP
+should give you access to the complete manual.
--- hugo-2.12/hugod.6 1970-01-01 01:00:00.000000000 +0100
+++ hugo-2.13-pre/hugod.6 2009-01-13 14:33:13.000000000 +0200
@@ -0,0 +1,20 @@
+.TH Hu-Go! Netplay Server "6"
+.SH NAME
+hugo_server \- server for multiplay
+.SH SYNOPSIS
+.B hugo_server
+.I "[options] ..."
+.SH "DESCRIPTION"
+This manual page documents briefly the
+.BR hugo_server command.
+This manual page was written for the Debian GNU/Linux distribution
+because the original program does not have a manual page.
+Instead, it has documentation in the GNU Info format; see below.
+.br
+This man should be completed before any release
+.PP
+.B hugo_server
+is a program that run a server for connecting multiple hugo clients
+.SH AUTHOR
+This manual page was written by Olivier Jolly <olivier.jolly@pcedev.com>,
+for the Debian GNU/Linux system (but may be used by others).
--- hugo-2.12/defs.h 2003-02-18 09:26:48.000000000 +0100
+++ hugo-2.13-pre/defs.h 2005-09-27 19:58:15.000000000 +0200
@@ -58,7 +58,7 @@
typedef struct op {
int (*func_exe)(void);
Int16 addr_mode;
- Char * opname;
+ char * opname;
// short int filler[3]; // force align to power-of-2 (?)
} operation;
--- hugo-2.12/gfx.c 2005-04-05 21:53:14.000000000 +0200
+++ hugo-2.13-pre/gfx.c 2005-10-27 10:14:46.000000000 +0200
@@ -25,6 +25,11 @@
#include "utils.h"
#include "config.h"
+#if defined(GTK)
+#include <gtk/gtk.h>
+#endif
+
+
typedef struct {
UChar r,g,b;
} rgb_map_struct;
--- hugo-2.12/gtk_main.c 2005-03-14 21:17:23.000000000 +0100
+++ hugo-2.13-pre/gtk_main.c 2005-10-28 10:55:05.000000000 +0200
@@ -4,6 +4,7 @@
#include "callbacks.h"
#include "sys_inp.h"
#include "iniconfig.h"
+#include "utils.h"
#if defined(SDL)
@@ -86,7 +87,6 @@
static int gui_configuration_index = 0;
-static int player_index = 0;
//! Setter for gui_configuration_index
void set_gui_configuration_index(int new_index)
--- hugo-2.12/h6280.c 2005-03-27 23:23:53.000000000 +0200
+++ hugo-2.13-pre/h6280.c 2005-10-27 10:14:46.000000000 +0200
@@ -63,16 +63,8 @@
return( (UChar) (PageR[memreg][addr]));
}
-#if !defined(INLINED_ACCESSORS)
-
-#define get_8bit_addr(addr) Rd6502((addr))
-
-#define put_8bit_addr(addr,byte) Wr6502((addr),(byte))
-
-#define get_16bit_addr(addr) (Rd6502(addr) + (Rd6502((UInt16)(addr + 1)) << 8))
-
-#else
+#if defined(INLINED_ACCESSORS)
// This is the more generalized access routine:
inline UChar get_8bit_addr(UInt16 addr) {
@@ -2835,7 +2827,7 @@
static void
Int6502 (UChar Type)
{
- UInt16 J;
+ UInt16 J = 0;
if ((Type == INT_NMI) || (!(reg_p & FL_I)))
{
--- hugo-2.12/hard_pce.h 2004-05-26 22:54:15.000000000 +0200
+++ hugo-2.13-pre/hard_pce.h 2005-10-27 09:30:58.000000000 +0200
@@ -64,8 +64,8 @@
UChar IO_read (UInt16 A);
void bank_set (UChar P, UChar V);
-void (*write_memory_function)(UInt16,UChar);
-UChar (*read_memory_function)(UInt16);
+extern void (*write_memory_function)(UInt16,UChar);
+extern UChar (*read_memory_function)(UInt16);
#define Wr6502(A,V) ((*write_memory_function)((A),(V)))
--- hugo-2.12/hugo.c 2005-03-28 20:18:28.000000000 +0200
+++ hugo-2.13-pre/hugo.c 2005-10-27 10:14:46.000000000 +0200
@@ -1,4 +1,6 @@
+
#include "hugo.h"
+#include "utils.h"
//! name of the backup ram filename
@@ -196,7 +198,14 @@
}
else
{
+#if defined (MORPHOS)
+ // Build and execute the MUI GUI here!
+ // since no game was specified on the
+ // command line
+ InitInterface_MUI();
+#else
printf ("No game specified\n");
+#endif
}
}
#endif
--- hugo-2.12/iniconfig.c 2005-04-05 22:19:10.000000000 +0200
+++ hugo-2.13-pre/iniconfig.c 2005-10-27 09:33:49.000000000 +0200
@@ -16,7 +16,8 @@
#include "iniconfig.h"
#include "utils.h"
-#if !defined(WIN32) && !defined(SOLARIS)
+#if !defined(WIN32) && !defined(SOLARIS) && !defined(MORPHOS) && !defined(__APPLE__)
+#define HAVE_ARGP_H 1
#include <argp.h>
#endif
@@ -382,7 +383,7 @@
}
}
-#if !defined(WIN32) && !defined(SOLARIS)
+#if defined(HAVE_ARGP_H)
//! program header for GNU argp function
const char *argp_program_version = "Hu-Go! 2.12";
@@ -553,13 +554,13 @@
void
parse_commandline (int argc, char **argv)
{
-#if defined(WIN32) || defined(SOLARIS)
+#if !defined(HAVE_ARGP_H)
char next_arg, i, arg_error = 0;
#endif
Log ("--[ PARSING COMMAND LINE ]--------------------------\n");
-#if !defined(WIN32) && !defined(SOLARIS)
+#if defined(HAVE_ARGP_H)
argp_parse (&argp, argc, argv, 0, 0, &option);
#else
next_arg = 0;
--- hugo-2.12/instr-switch.c 1970-01-01 01:00:00.000000000 +0100
+++ hugo-2.13-pre/instr-switch.c 2004-05-24 20:50:36.000000000 +0200
@@ -0,0 +1,2132 @@
+//#define STANDALONE
+#if STANDALONE
+typedef int Char;
+typedef int UChar;
+typedef int UInt16;
+extern int cycles;
+extern int reg_p, reg_a, reg_x, reg_y, reg_pc, reg_s;
+extern int FL_T, FL_N, FL_V, FL_Z, FL_C, FL_B, FL_D, FL_I;
+extern int flnz_list[];
+extern UChar* mmr;
+extern UChar *PageR[8];
+
+extern UChar get_8bit_addr(UInt16 addr);
+extern void put_8bit_addr(UInt16 addr, UChar byte);
+extern UInt16 get_16bit_addr(UInt16 addr);
+extern UChar get_8bit_zp(UChar zp_addr);
+extern UInt16 get_16bit_zp(UChar zp_addr);
+extern void put_8bit_zp(UChar zp_addr, UChar byte);
+extern void push_8bit(UChar byte);
+extern UChar pull_8bit(void);
+extern void push_16bit(UInt16 addr);
+extern UInt16 pull_16bit(void);
+
+extern UChar abs_operand(UInt16 addr);
+extern UChar absx_operand(UInt16 addr);
+extern UChar absy_operand(UInt16 addr);
+extern UChar zpind_operand(UInt16 addr);
+extern UChar zpindx_operand(UInt16 addr);
+extern UChar zpindy_operand(UInt16 addr);
+extern UChar zp_operand(UChar zp_addr);
+extern UChar zpx_operand(UChar zp_addr);
+extern UChar zpy_operand(UChar zp_addr);
+#endif
+
+/* optimized flag computation */
+//grep 'reg_p[^c]' instr-switch.c | grep -v 'reg_p =' | grep -v 'reg_p &='
+/* #define FAST_FLAGS */
+#ifdef FAST_FLAGS
+/* unless I once more made sth stupid FAST_FLAGS does not improve speed */
+/* optimized */
+#define SET_NV(x) ((x)&0xC0)
+/* nothing to optimize */
+#define SET_CTST(x) ((x) ? 0:FL_C)
+/* optimized */
+#define SET_C01(x) ((x)&0x01)
+/* not optimized (use shift; ensure reg_p is 8 bit) */
+#if 0
+#define SET_C80(x) (((x)&0x80) ? FL_C:0)
+#else
+#define SET_C80(x) (((x)&0x80) >> 7)
+#endif
+/* nothing to optimize */
+#define SET_Z(x) ((x) ? 0:FL_Z)
+/* nothing to optimize */
+#define CLEAR_NVTZ (reg_p & ~(FL_N|FL_V|FL_T|FL_Z))
+/* nothing to optimize */
+#define CLEAR_NTZC (reg_p & ~(FL_N|FL_T|FL_Z|FL_C))
+/* optimized */
+#define GET_C (reg_p & FL_C)
+/* optimized */
+#define GET_C80 ((reg_p & FL_C) << 7)
+#define IS_SET_T (reg_p & FL_T)
+#define IS_SET_C (reg_p & FL_C)
+#define IS_SET_N (reg_p & FL_N)
+#define IS_SET_Z (reg_p & FL_Z)
+#define IS_SET_V (reg_p & FL_V)
+#else
+#define SET_N(x) (((x)&0x80) ? FL_N:0)
+#define SET_V(x) (((x)&0x40) ? FL_V:0)
+#define SET_NV(x) SET_N(x) | SET_V(x)
+#define SET_C(x) ((x) ? FL_C:0)
+#define SET_CTST(x) ((x) ? 0:FL_C)
+#define SET_C01(x) SET_C((x)&0x01)
+#define SET_C80(x) SET_C((x)&0x80)
+#define SET_Z(x) ((x) ? 0:FL_Z)
+#define CLEAR_NVTZ (reg_p & ~(FL_N|FL_V|FL_T|FL_Z))
+#define CLEAR_NTZC (reg_p & ~(FL_N|FL_T|FL_Z|FL_C))
+#define GET_C ((reg_p & FL_C) ? 1:0)
+#define GET_C80 ((reg_p & FL_C) ? 0x80:0)
+#define IS_SET_T (reg_p & FL_T)
+#define IS_SET_C (reg_p & FL_C)
+#define IS_SET_N (reg_p & FL_N)
+#define IS_SET_Z (reg_p & FL_Z)
+#define IS_SET_V (reg_p & FL_V)
+#endif
+
+#if STANDALONE
+void foo() {
+ int err;
+#endif
+
+ switch (PageR[reg_pc>>13][reg_pc]) {
+ case 0x00: /* brek, AM_IMMED, "BRK" */
+ push_16bit(reg_pc+2);
+ reg_p &= ~FL_T;
+ push_8bit(reg_p|FL_B);
+ reg_p =(reg_p & ~FL_D) | FL_I;
+ reg_pc=get_16bit_addr(0xFFF6);
+ cycles+=8;
+ break;
+ case 0x01: /* ora_zpindx, AM_ZPINDX, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= zpindx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a |= zpindx_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x02: /* sxy, AM_IMPL, "SXY" */
+ {
+ UChar temp = reg_y;
+ reg_p &= ~FL_T;
+ reg_y = reg_x;
+ reg_x = temp;
+ reg_pc++;
+ cycles+=3;
+ }
+ break;
+ case 0x03: /* st0, AM_IMMED, "ST0" */
+ reg_p &= ~FL_T;
+ IO_write(0,imm_operand(reg_pc+1));
+ reg_pc+=2;
+ cycles+=4;
+ break;
+ case 0x04: /* tsb_zp, AM_ZP, "TSB" */
+ {
+ UChar zp_addr = imm_operand(reg_pc+1);
+ UChar temp = get_8bit_zp(zp_addr);
+ UChar temp1 = reg_a | temp;
+ reg_p = CLEAR_NVTZ | SET_NV(temp1) | SET_Z(temp & reg_a);
+ put_8bit_zp(zp_addr, temp1);
+ reg_pc+=2;
+ cycles+=6;
+ }
+ break;
+ case 0x05: /* ora_zp, AM_ZP, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= zp_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=7;
+ } else {
+ chk_flnz_8bit(reg_a |= zp_operand(reg_pc+1));
+ cycles+=4;
+ }
+ reg_pc+=2;
+ break;
+ case 0x06: /* asl_zp, AM_ZP, "ASL" */
+ {
+ UChar zp_addr = imm_operand(reg_pc+1);
+ UChar temp1 = get_8bit_zp(zp_addr);
+ UChar temp = temp1<<1;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ cycles+=6;
+ put_8bit_zp(zp_addr, temp);
+ reg_pc+=2;
+ }
+ break;
+ case 0x07: /* rmb0, AM_ZP, "RMB0" */
+ {
+ UChar temp = imm_operand(reg_pc+1);
+ reg_p &= ~FL_T;
+ put_8bit_zp(temp, get_8bit_zp(temp) & (~0x01));
+ reg_pc+=2;
+ cycles+=7;
+ }
+ break;
+ case 0x08: /* php, AM_IMPL, "PHP" */
+ reg_p &= ~FL_T;
+ push_8bit(reg_p);
+ reg_pc++;
+ cycles+=3;
+ break;
+ case 0x09: /* ora_imm, AM_IMMED, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= imm_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=5;
+ } else {
+ chk_flnz_8bit(reg_a |= imm_operand(reg_pc+1));
+ cycles+=2;
+ }
+ reg_pc+=2;
+ break;
+ case 0x0A: /* asl_a, AM_IMPL, "ASL" */
+ {
+ UChar temp1 = reg_a;
+ reg_a<<=1;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[reg_a];
+ cycles+=2;
+ reg_pc++;
+ }
+ break;
+ case 0x0B: /* handle_bp0, AM_IMPL, "BP0" */
+ handle_bp0();
+ break;
+ case 0x0C: /* tsb_abs, AM_ABS, "TSB" */
+ {
+ UInt16 abs_addr = get_16bit_addr(reg_pc+1);
+ UChar temp = get_8bit_addr(abs_addr);
+ UChar temp1 = reg_a | temp;
+ reg_p = CLEAR_NVTZ | SET_NV(temp1) | SET_Z(temp & reg_a);
+ cycles+=7;
+ put_8bit_addr(abs_addr, temp1);
+ reg_pc+=3;
+ }
+ break;
+ case 0x0D: /* ora_abs, AM_ABS, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= abs_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=8;
+ } else {
+ chk_flnz_8bit(reg_a |= abs_operand(reg_pc+1));
+ cycles+=5;
+ }
+ reg_pc+=3;
+ break;
+ case 0x0E: /* asl_abs, AM_ABS, "ASL" */
+ {
+ UInt16 temp_addr = get_16bit_addr(reg_pc+1);
+ UChar temp1 = get_8bit_addr(temp_addr);
+ UChar temp = temp1<<1;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ cycles+=7;
+ put_8bit_addr(temp_addr,temp);
+ reg_pc+=3;
+ }
+ break;
+ case 0x0F: /* bbr0, AM_PSREL, "BBR0" */
+ reg_p &= ~FL_T;
+ if (zp_operand(reg_pc+1)&0x01) {
+ reg_pc+=3;
+ cycles+=6;
+ } else {
+ reg_pc+=(Char)imm_operand(reg_pc+2)+3;
+ cycles+=8;
+ }
+ break;
+ case 0x10: /* bpl, AM_REL, "BPL" */
+ reg_p &= ~FL_T;
+ if (IS_SET_N) {
+ reg_pc+=2;
+ cycles+=2;
+ } else {
+ reg_pc+=(Char)imm_operand(reg_pc+1)+2;
+ cycles+=4;
+ }
+ break;
+ case 0x11: /* ora_zpindy, AM_ZPINDY, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= zpindy_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a |= zpindy_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x12: /* ora_zpind, AM_ZPIND, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= zpind_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a |= zpind_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x13: /* st1, AM_IMMED, "ST1" */
+ reg_p &= ~FL_T;
+ IO_write(2,imm_operand(reg_pc+1));
+ reg_pc+=2;
+ cycles+=4;
+ break;
+ case 0x14: /* trb_zp, AM_ZP, "TRB" */
+ {
+ UChar zp_addr = imm_operand(reg_pc+1);
+ UChar temp = get_8bit_zp(zp_addr);
+ UChar temp1 = (~reg_a) & temp;
+ reg_p = CLEAR_NVTZ | SET_NV(temp1) | SET_Z(temp & reg_a);
+ put_8bit_zp(zp_addr, temp1);
+ reg_pc+=2;
+ cycles+=6;
+ }
+ break;
+ case 0x15: /* ora_zpx, AM_ZPX, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= zpx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=7;
+ } else {
+ chk_flnz_8bit(reg_a |= zpx_operand(reg_pc+1));
+ cycles+=4;
+ }
+ reg_pc+=2;
+ break;
+ case 0x16: /* asl_zpx, AM_ZPX, "ASL" */
+ {
+ UChar zp_addr = imm_operand(reg_pc+1)+reg_x;
+ UChar temp1 = get_8bit_zp(zp_addr);
+ UChar temp = temp1<<1;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ cycles+=6;
+ put_8bit_zp(zp_addr, temp);
+ reg_pc+=2;
+ }
+ break;
+ case 0x17: /* rmb1, AM_ZP, "RMB1" */
+ {
+ UChar temp = imm_operand(reg_pc+1);
+ reg_p &= ~FL_T;
+ put_8bit_zp(temp, get_8bit_zp(temp) & (~0x02));
+ reg_pc+=2;
+ cycles+=7;
+ }
+ break;
+ case 0x18: /* clc, AM_IMPL, "CLC" */
+ reg_p &= ~(FL_T|FL_C);
+ reg_pc++;
+ cycles+=2;
+ break;
+ case 0x19: /* ora_absy, AM_ABSY, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= absy_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=8;
+ } else {
+ chk_flnz_8bit(reg_a |= absy_operand(reg_pc+1));
+ cycles+=5;
+ }
+ reg_pc+=3;
+ break;
+ case 0x1A: /* inc_a, AM_IMPL, "INC" */
+ chk_flnz_8bit(++reg_a);
+ reg_pc++;
+ cycles+=2;
+ break;
+ case 0x1B: /* handle_bp1, AM_IMPL, "BP1" */
+ handle_bp1();
+ break;
+ case 0x1C: /* trb_abs, AM_ABS, "TRB" */
+ {
+ UInt16 abs_addr = get_16bit_addr(reg_pc+1);
+ UChar temp = get_8bit_addr(abs_addr);
+ UChar temp1 = (~reg_a) & temp;
+ reg_p = CLEAR_NVTZ | SET_NV(temp1) | SET_Z(temp & reg_a);
+ cycles+=7;
+ put_8bit_addr(abs_addr, temp1);
+ reg_pc+=3;
+ }
+ break;
+ case 0x1D: /* ora_absx, AM_ABSX, "ORA" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp |= absx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=8;
+ } else {
+ chk_flnz_8bit(reg_a |= absx_operand(reg_pc+1));
+ cycles+=5;
+ }
+ reg_pc+=3;
+ break;
+ case 0x1E: /* asl_absx, AM_ABSX, "ASL" */
+ {
+ UInt16 temp_addr = get_16bit_addr(reg_pc+1)+reg_x;
+ UChar temp1 = get_8bit_addr(temp_addr);
+ UChar temp = temp1<<1;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ cycles+=7;
+ put_8bit_addr(temp_addr,temp);
+ reg_pc+=3;
+ }
+ break;
+ case 0x1F: /* bbr1, AM_PSREL, "BBR1" */
+ reg_p &= ~FL_T;
+ if (zp_operand(reg_pc+1)&0x02) {
+ reg_pc+=3;
+ cycles+=6;
+ } else {
+ reg_pc+=(Char)imm_operand(reg_pc+2)+3;
+ cycles+=8;
+ }
+ break;
+ case 0x20: /* jsr, AM_ABS, "JSR" */
+ reg_p &= ~FL_T;
+ push_16bit(reg_pc+2);
+ reg_pc = get_16bit_addr(reg_pc+1);
+ cycles+=7;
+ break;
+ case 0x21: /* and_zpindx, AM_ZPINDX, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= zpindx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a &= zpindx_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x22: /* sax, AM_IMPL, "SAX" */
+ {
+ UChar temp = reg_x;
+ reg_p &= ~FL_T;
+ reg_x = reg_a;
+ reg_a = temp;
+ reg_pc++;
+ cycles+=3;
+ }
+ break;
+ case 0x23: /* st2, AM_IMMED, "ST2" */
+ reg_p &= ~FL_T;
+ IO_write(3,imm_operand(reg_pc+1));
+ reg_pc+=2;
+ cycles+=4;
+ break;
+ case 0x24: /* bit_zp, AM_ZP, "BIT" */
+ {
+ UChar temp = zp_operand(reg_pc+1);
+ reg_p = CLEAR_NVTZ | SET_NV(temp) | SET_Z(reg_a&temp);
+ reg_pc+=2;
+ cycles+=4;
+ }
+ break;
+ case 0x25: /* and_zp, AM_ZP, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= zp_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=7;
+ } else {
+ chk_flnz_8bit(reg_a &= zp_operand(reg_pc+1));
+ cycles+=4;
+ }
+ reg_pc+=2;
+ break;
+ case 0x26: /* rol_zp, AM_ZP, "ROL" */
+ {
+ UChar flg_tmp = GET_C;
+ UChar zp_addr = imm_operand(reg_pc+1);
+ UChar temp1 = get_8bit_zp(zp_addr);
+ UChar temp = (temp1<<1)+flg_tmp;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ put_8bit_zp(zp_addr, temp);
+ reg_pc+=2;
+ cycles+=6;
+ }
+ break;
+ case 0x27: /* rmb2, AM_ZP, "RMB2" */
+ {
+ UChar temp = imm_operand(reg_pc+1);
+ reg_p &= ~FL_T;
+ put_8bit_zp(temp, get_8bit_zp(temp) & (~0x04));
+ reg_pc+=2;
+ cycles+=7;
+ }
+ break;
+ case 0x28: /* plp, AM_IMPL, "PLP" */
+ reg_p = pull_8bit();
+ reg_pc++;
+ cycles+=4;
+ break;
+ case 0x29: /* and_imm, AM_IMMED, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= imm_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=5;
+ } else {
+ chk_flnz_8bit(reg_a &= imm_operand(reg_pc+1));
+ cycles+=2;
+ }
+ reg_pc+=2;
+ break;
+ case 0x2A: /* rol_a, AM_IMPL, "ROL" */
+ {
+ UChar flg_tmp = GET_C;
+ UChar temp = reg_a;
+ reg_a = (reg_a<<1)+flg_tmp;
+ reg_p = CLEAR_NTZC | SET_C80(temp) | flnz_list[reg_a];
+ reg_pc++;
+ cycles+=2;
+ }
+ break;
+ case 0x2B: /* handle_bp2, AM_IMPL, "BP2" */
+ handle_bp2();
+ break;
+ case 0x2C: /* bit_abs, AM_ABS, "BIT" */
+ {
+ UChar temp = abs_operand(reg_pc+1);
+ reg_p = CLEAR_NVTZ | SET_NV(temp) | SET_Z(reg_a&temp);
+ reg_pc+=3;
+ cycles+=5;
+ }
+ break;
+ case 0x2D: /* and_abs, AM_ABS, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= abs_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=8;
+ } else {
+ chk_flnz_8bit(reg_a &= abs_operand(reg_pc+1));
+ cycles+=5;
+ }
+ reg_pc+=3;
+ break;
+ case 0x2E: /* rol_abs, AM_ABS, "ROL" */
+ {
+ UChar flg_tmp = GET_C;
+ UInt16 temp_addr = get_16bit_addr(reg_pc+1);
+ UChar temp1 = get_8bit_addr(temp_addr);
+ UChar temp = (temp1<<1)+flg_tmp;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ cycles+=7;
+ put_8bit_addr(temp_addr, temp);
+ reg_pc+=3;
+ }
+ break;
+ case 0x2F: /* bbr2, AM_PSREL, "BBR2" */
+ reg_p &= ~FL_T;
+ if (zp_operand(reg_pc+1)&0x04) {
+ reg_pc+=3;
+ cycles+=6;
+ } else {
+ reg_pc+=(Char)imm_operand(reg_pc+2)+3;
+ cycles+=8;
+ }
+ break;
+ case 0x30: /* bmi, AM_REL, "BMI" */
+ reg_p &= ~FL_T;
+ if (IS_SET_N) {
+ reg_pc+=(Char)imm_operand(reg_pc+1)+2;
+ cycles+=4;
+ } else {
+ reg_pc+=2;
+ cycles+=2;
+ }
+ break;
+ case 0x31: /* and_zpindy, AM_ZPINDY, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= zpindy_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a &= zpindy_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x32: /* and_zpind, AM_ZPIND, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= zpind_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a &= zpind_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x33: /* halt, AM_IMPL, "???" */
+ err = 1;
+ break;
+ case 0x34: /* bit_zpx, AM_ZPX, "BIT" */
+ {
+ UChar temp = zpx_operand(reg_pc+1);
+ reg_p = CLEAR_NVTZ | SET_NV(temp) | SET_Z(reg_a&temp);
+ reg_pc+=2;
+ cycles+=4;
+ }
+ break;
+ case 0x35: /* and_zpx, AM_ZPX, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= zpx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=7;
+ } else {
+ chk_flnz_8bit(reg_a &= zpx_operand(reg_pc+1));
+ cycles+=4;
+ }
+ reg_pc+=2;
+ break;
+ case 0x36: /* rol_zpx, AM_ZPX, "ROL" */
+ {
+ UChar flg_tmp = GET_C;
+ UChar zp_addr = imm_operand(reg_pc+1)+reg_x;
+ UChar temp1 = get_8bit_zp(zp_addr);
+ UChar temp = (temp1<<1)+flg_tmp;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ put_8bit_zp(zp_addr, temp);
+ reg_pc+=2;
+ cycles+=6;
+ }
+ break;
+ case 0x37: /* rmb3, AM_ZP, "RMB3" */
+ {
+ UChar temp = imm_operand(reg_pc+1);
+ reg_p &= ~FL_T;
+ put_8bit_zp(temp, get_8bit_zp(temp) & (~0x08));
+ reg_pc+=2;
+ cycles+=7;
+ }
+ break;
+ case 0x38: /* sec, AM_IMPL, "SEC" */
+ reg_p = (reg_p|FL_C) & ~FL_T;
+ reg_pc++;
+ cycles+=2;
+ break;
+ case 0x39: /* and_absy, AM_ABSY, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= absy_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=8;
+ } else {
+ chk_flnz_8bit(reg_a &= absy_operand(reg_pc+1));
+ cycles+=5;
+ }
+ reg_pc+=3;
+ break;
+ case 0x3A: /* dec_a, AM_IMPL, "DEC" */
+ chk_flnz_8bit(--reg_a);
+ reg_pc++;
+ cycles+=2;
+ break;
+ case 0x3B: /* handle_bp3, AM_IMPL, "BP3" */
+ handle_bp3();
+ break;
+ case 0x3C: /* bit_absx, AM_ABSX, "BIT" */
+ {
+ UChar temp = absx_operand(reg_pc+1);
+ reg_p = CLEAR_NVTZ | SET_NV(temp) | SET_Z(reg_a&temp);
+ reg_pc+=3;
+ cycles+=5;
+ }
+ break;
+ case 0x3D: /* and_absx, AM_ABSX, "AND" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp &= absx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=8;
+ } else {
+ chk_flnz_8bit(reg_a &= absx_operand(reg_pc+1));
+ cycles+=5;
+ }
+ reg_pc+=3;
+ break;
+ case 0x3E: /* rol_absx, AM_ABSX, "ROL" */
+ {
+ UChar flg_tmp = GET_C;
+ UInt16 temp_addr = get_16bit_addr(reg_pc+1)+reg_x;
+ UChar temp1 = get_8bit_addr(temp_addr);
+ UChar temp = (temp1<<1)+flg_tmp;
+ reg_p = CLEAR_NTZC | SET_C80(temp1) | flnz_list[temp];
+ cycles+=7;
+ put_8bit_addr(temp_addr, temp);
+ reg_pc+=3;
+ }
+ break;
+ case 0x3F: /* bbr3, AM_PSREL, "BBR3" */
+ reg_p &= ~FL_T;
+ if (zp_operand(reg_pc+1)&0x08) {
+ reg_pc+=3;
+ cycles+=6;
+ } else {
+ reg_pc+=(Char)imm_operand(reg_pc+2)+3;
+ cycles+=8;
+ }
+ break;
+ case 0x40: /* rti, AM_IMPL, "RTI" */
+ reg_p = pull_8bit() & ~FL_B;
+ reg_pc = pull_16bit();
+ cycles+=7;
+ break;
+ case 0x41: /* eor_zpindx, AM_ZPINDX, "EOR" */
+ if (IS_SET_T) {
+ UChar temp = get_8bit_zp(reg_x);
+ chk_flnz_8bit(temp ^= zpindx_operand(reg_pc+1));
+ put_8bit_zp(reg_x, temp);
+ cycles+=10;
+ } else {
+ chk_flnz_8bit(reg_a ^= zpindx_operand(reg_pc+1));
+ cycles+=7;
+ }
+ reg_pc+=2;
+ break;
+ case 0x42:
+ {
+ UChar temp = reg_y;
+ reg_p &= ~FL_T;
+ reg_y = reg_a;