diff --git a/Platforms/Xiaomi/sagitPkg/Include/ACPI.inc b/Platforms/Xiaomi/sagitPkg/Include/ACPI.inc new file mode 100644 index 000000000..800965850 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Include/ACPI.inc @@ -0,0 +1,20 @@ +#FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { +# SECTION RAW = MSM8998/APIC.aml +# SECTION RAW = MSM8998/BERT.aml +# SECTION RAW = MSM8998/BGRT.aml +# SECTION RAW = MSM8998/CSRT.aml +# SECTION RAW = MSM8998/DBG2.aml +# SECTION RAW = MSM8998/DSDT.aml +# SECTION RAW = MSM8998/FACP.aml +# SECTION RAW = MSM8998/FPDT.aml +# SECTION RAW = MSM8998/GTDT.aml +# SECTION RAW = MSM8998/IORT.aml +# SECTION RAW = MSM8998/MCFG.aml +# SECTION RAW = MSM8998/MSDM.aml +# SECTION RAW = MSM8998/PPTT.aml +# SECTION RAW = MSM8998/SPCR.aml +# SECTION RAW = MSM8998/TPM2.aml +# SECTION RAW = MSM8998/XSDT.aml +# SECTION UI = "AcpiTables" +#} +# \ No newline at end of file diff --git a/Platforms/Xiaomi/sagitPkg/Include/APRIORI.inc b/Platforms/Xiaomi/sagitPkg/Include/APRIORI.inc new file mode 100644 index 000000000..61f172c50 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Include/APRIORI.inc @@ -0,0 +1,125 @@ +APRIORI DXE { + # First, install the PCD driver and call DxeInit + INF MdeModulePkg/Core/Dxe/DxeMain.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + INF Binaries/sagit/QcomPkg/Drivers/EnvDxe/EnvDxe.inf + + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + + # Next, install cpu protocol and enable the interrupt controller + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + + # Core Drivers + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + + INF Binaries/generic/CobaltWP/SmemDxe/SmemDxe.inf + + INF QcomPkg/Drivers/DynamicRamDxe/DynamicRamDxe.inf + + INF Binaries/generic/CobaltWP/DALSys/DALSys.inf + INF Binaries/generic/CobaltWP/HWIODxeDriver/HWIODxeDriver.inf + INF Binaries/generic/CobaltWP/ChipInfo/ChipInfo.inf + INF Binaries/generic/CobaltWP/PlatformInfoDxeDriver/PlatformInfoDxeDriver.inf + + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + INF Binaries/generic/CobaltWP/GlinkDxe/GlinkDxe.inf + INF Binaries/generic/CobaltWP/ULogDxe/ULogDxe.inf + INF Binaries/generic/CobaltWP/NpaDxe/NpaDxe.inf + INF Binaries/generic/CobaltWP/ClockDxe/ClockDxe.inf + + INF QcomPkg/Drivers/ClockSpeedUpDxe/ClockSpeedUpDxe.inf + + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + + INF Binaries/generic/CobaltWP/SdccDxe/SdccDxe.inf + INF Binaries/generic/CobaltWP/UFSDxe/UFSDxe.inf + + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + + INF Binaries/sagit/QcomPkg/Drivers/QdssDxe/QdssDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + # DppDxe + + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + INF Binaries/poplar/QcomPkg/Drivers/FontDxe/FontDxe.inf + + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + + INF Binaries/generic/CobaltWP/DALTLMM/DALTLMM.inf + INF Binaries/generic/CobaltWP/I2C/I2C.inf + INF Binaries/generic/CobaltWP/SPMI/SPMI.inf + INF Binaries/generic/CobaltWP/SPI/SPI.inf + INF Binaries/generic/CobaltWP/PmicDxe/PmicDxe.inf + INF Binaries/generic/CobaltWP/AdcDxe/AdcDxe.inf +# INF Binaries/poplar/QcomPkg/Drivers/QcomChargerDxe/QcomChargerDxeLA.inf + INF Binaries/generic/CobaltWP/UsbfnDwc3Dxe/UsbfnDwc3Dxe.inf + + INF Binaries/generic/CobaltWP/XhciPciEmulation/XhciPciEmulation.inf + INF Binaries/generic/CobaltWP/XhciDxe/XhciDxe.inf + + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + INF Binaries/generic/CobaltWP/UsbKbDxe/UsbKbDxe.inf + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + INF Binaries/generic/CobaltWP/UsbTypeCDxe/UsbTypeCDxe.inf + INF Binaries/generic/CobaltWP/UsbInitDxe/UsbInitDxe.inf + INF Binaries/generic/CobaltWP/UsbfnChgDxe/UsbfnChgDxe.inf + INF Binaries/generic/CobaltWP/UsbMouseDxe/UsbMouseDxe.inf + INF Binaries/generic/CobaltWP/UsbMsdDxe/UsbMsdDxe.inf + INF Binaries/generic/CobaltWP/UsbDeviceDxe/UsbDeviceDxe.inf + INF Binaries/generic/CobaltWP/UsbConfigDxe/UsbConfigDxe.inf + + # DebugPortDxe + # SerialDxe + + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + + INF Binaries/sagit/QcomPkg/Drivers/ButtonsDxe/ButtonsDxe.inf + # TsFwUpgradeDxe +# INF Binaries/sagit/QcomPkg/Drivers/TsensDxe/TsensDxe.inf + +!if $(USE_CUSTOM_DISPLAY_DRIVER) == 1 + INF Binaries/sagit/QcomPkg/Drivers/DisplayDxe/DisplayDxe.inf +!else + INF SiliciumPkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf +!endif + +# INF Binaries/sagit/QcomPkg/Drivers/TzDxe/TzDxeLA.inf +# INF Binaries/sagit/QcomPkg/Drivers/LimitsDxe/LimitsDxe.inf +# INF Binaries/sagit/QcomPkg/Drivers/MdtpDxe/MdtpDxe.inf + + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + +# INF Binaries/sagit/QcomPkg/Drivers/HashDxe/HashDxe.inf +# INF Binaries/sagit/QcomPkg/Drivers/RNGDxe/RngDxe.inf + # OSConfigDxe + # MpParkDxe + INF Binaries/generic/CobaltWP/MpPowerDxe/MpPowerDxe.inf + + INF MSM8998Pkg/Drivers/SmBiosTableDxe/SmBiosTableDxe.inf + + # MemoryMapDxe + # AdapterInformationDxe +} diff --git a/Platforms/Xiaomi/sagitPkg/Include/DXE.inc b/Platforms/Xiaomi/sagitPkg/Include/DXE.inc new file mode 100644 index 000000000..aec90deba --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Include/DXE.inc @@ -0,0 +1,104 @@ + # First, install the PCD driver and call DxeInit + INF MdeModulePkg/Core/Dxe/DxeMain.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + INF Binaries/sagit/QcomPkg/Drivers/EnvDxe/EnvDxe.inf + + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + + # Next, install cpu protocol and enable the interrupt controller + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + + # Core Drivers + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + + INF Binaries/generic/CobaltWP/SmemDxe/SmemDxe.inf + + INF QcomPkg/Drivers/DynamicRamDxe/DynamicRamDxe.inf + + INF Binaries/generic/CobaltWP/DALSys/DALSys.inf + INF Binaries/generic/CobaltWP/HWIODxeDriver/HWIODxeDriver.inf + INF Binaries/generic/CobaltWP/ChipInfo/ChipInfo.inf + INF Binaries/generic/CobaltWP/PlatformInfoDxeDriver/PlatformInfoDxeDriver.inf + + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + INF Binaries/generic/CobaltWP/GlinkDxe/GlinkDxe.inf + INF Binaries/generic/CobaltWP/ULogDxe/ULogDxe.inf + INF Binaries/generic/CobaltWP/NpaDxe/NpaDxe.inf + INF Binaries/generic/CobaltWP/ClockDxe/ClockDxe.inf + + INF QcomPkg/Drivers/ClockSpeedUpDxe/ClockSpeedUpDxe.inf + + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + + INF Binaries/generic/CobaltWP/SdccDxe/SdccDxe.inf + INF Binaries/generic/CobaltWP/UFSDxe/UFSDxe.inf + + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + + INF Binaries/sagit/QcomPkg/Drivers/QdssDxe/QdssDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + # DppDxe + + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + INF Binaries/poplar/QcomPkg/Drivers/FontDxe/FontDxe.inf + + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + + INF Binaries/generic/CobaltWP/DALTLMM/DALTLMM.inf + INF Binaries/generic/CobaltWP/I2C/I2C.inf + INF Binaries/generic/CobaltWP/SPMI/SPMI.inf + INF Binaries/generic/CobaltWP/SPI/SPI.inf + INF Binaries/generic/CobaltWP/PmicDxe/PmicDxe.inf + INF Binaries/generic/CobaltWP/AdcDxe/AdcDxe.inf +# INF Binaries/poplar/QcomPkg/Drivers/QcomChargerDxe/QcomChargerDxeLA.inf + INF Binaries/generic/CobaltWP/UsbfnDwc3Dxe/UsbfnDwc3Dxe.inf + + INF Binaries/generic/CobaltWP/XhciPciEmulation/XhciPciEmulation.inf + INF Binaries/generic/CobaltWP/XhciDxe/XhciDxe.inf + + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + INF Binaries/generic/CobaltWP/UsbKbDxe/UsbKbDxe.inf + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + INF Binaries/generic/CobaltWP/UsbTypeCDxe/UsbTypeCDxe.inf + INF Binaries/generic/CobaltWP/UsbInitDxe/UsbInitDxe.inf + INF Binaries/generic/CobaltWP/UsbfnChgDxe/UsbfnChgDxe.inf + INF Binaries/generic/CobaltWP/UsbMouseDxe/UsbMouseDxe.inf + INF Binaries/generic/CobaltWP/UsbMsdDxe/UsbMsdDxe.inf + INF Binaries/generic/CobaltWP/UsbDeviceDxe/UsbDeviceDxe.inf + INF Binaries/generic/CobaltWP/UsbConfigDxe/UsbConfigDxe.inf + + # DebugPortDxe + # SerialDxe + + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + + INF Binaries/sagit/QcomPkg/Drivers/ButtonsDxe/ButtonsDxe.inf + # TsFwUpgradeDxe +# INF Binaries/sagit/QcomPkg/Drivers/TsensDxe/TsensDxe.inf + +!if $(USE_CUSTOM_DISPLAY_DRIVER) == 1 + INF Binaries/sagit/QcomPkg/Drivers/DisplayDxe/DisplayDxe.inf +!else + INF SiliciumPkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf +!endif \ No newline at end of file diff --git a/Platforms/Xiaomi/sagitPkg/Include/RAW.inc b/Platforms/Xiaomi/sagitPkg/Include/RAW.inc new file mode 100644 index 000000000..cc930f9ef --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Include/RAW.inc @@ -0,0 +1,24 @@ + FILE FREEFORM = A91D838E-A5FA-4138-825D-455E2303079E { + SECTION UI = "BDS_Menu.cfg" + SECTION RAW = Binaries/poplar/RawFiles/BDS_Menu.cfg + } + + FILE FREEFORM = A1E235DE-E825-4591-9623-C43175811826 { + SECTION UI = "SecParti.cfg" + SECTION RAW = Binaries/poplar/RawFiles/SecParti.cfg + } + + FILE FREEFORM = F12A1F3D-4318-A006-5F7F-3FAAF6DBB4B5 { + SECTION UI = "tracer_event.cfg" + SECTION RAW = Binaries/poplar/RawFiles/tracer_event.cfg + } + + FILE FREEFORM = 45FE4B7C-150C-45DA-A021-4BEB2048EC6F { + SECTION UI = "QcomChargerCfg.cfg" + SECTION RAW = Binaries/poplar/RawFiles/QcomChargerCfg.cfg + } + + FILE FREEFORM = F780C779-DD7C-47CD-BD1A-5EB414C51704 { + SECTION UI = "BATTERY.PROVISION" + SECTION RAW = Binaries/poplar/RawFiles/BATTERY.PROVISION + } diff --git a/Platforms/Xiaomi/sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.c b/Platforms/Xiaomi/sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.c new file mode 100644 index 000000000..b91658e23 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.c @@ -0,0 +1,43 @@ +#include + +STATIC +CONFIGURATION_DESCRIPTOR_EX +gDeviceConfigurationDescriptorEx[] = { + // Configuration Map + {"NumCpusFuseAddr", 0x5C04C}, + {"EnableShell", 0x1}, + {"SharedIMEMBaseAddr", 0x146BF000}, + {"DloadCookieAddr", 0x01FD3000}, + {"DloadCookieValue", 0x10}, + {"MemoryCaptureModeOffset", 0x1C}, + {"AbnormalResetOccurredOffset", 0x24}, + {"DBIDumpDDRBase", 0x9FFD0000}, + {"NumCpus", 4}, + {"NumActiveCores", 8}, + {"MaxLogFileSize", 0x400000}, + {"USBHS1_Config", 0x0}, + {"UsbFnIoRevNum", 0x00010001}, + {"PwrBtnShutdownFlag", 0x0}, + {"Sdc1GpioConfigOn", 0x1E92}, + {"Sdc2GpioConfigOn", 0x1E92}, + {"Sdc1GpioConfigOff", 0xA00}, + {"Sdc2GpioConfigOff", 0xA00}, + {"EnableSDHCSwitch", 0x1}, + {"PSHoldOffset", 0xC000}, + {"PSHoldSHFT", 0x0}, + {"GCCResetValueAddress", 0x146BF028}, + {"SecurityFlag", 0xC4}, + {"TzAppsRegnAddr", 0x86D00000}, + {"TzAppsRegnSize", 0x02200000}, + {"EnableLogFsSyncInRetail", 0x0}, + {"EnableSecurityHoleForSplashPartition", 0x0}, + + // Terminator + {"Terminator", 0xFFFFFFFF} +}; + +CONFIGURATION_DESCRIPTOR_EX* +GetDeviceConfigurationMap () +{ + return gDeviceConfigurationDescriptorEx; +} diff --git a/Platforms/Xiaomi/sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.inf b/Platforms/Xiaomi/sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.inf new file mode 100644 index 000000000..c4aa3446a --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.inf @@ -0,0 +1,14 @@ +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = DeviceConfigurationMapLib + FILE_GUID = D7DDE228-62E4-43E3-B5A1-AB29FB9B0A35 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = DeviceConfigurationMapLib + +[Sources] + DeviceConfigurationMapLib.c + +[Packages] + MdePkg/MdePkg.dec + QcomPkg/QcomPkg.dec diff --git a/Platforms/Xiaomi/sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.c b/Platforms/Xiaomi/sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.c new file mode 100644 index 000000000..8f031c716 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.c @@ -0,0 +1,89 @@ +#include + +STATIC +ARM_MEMORY_REGION_DESCRIPTOR_EX +gDeviceMemoryDescriptorEx[] = { + // Name, Address, Length, HobOption, ResourceAttribute, ArmAttributes, ResourceType, MemoryType + + // DDR Regions + {"RAM Partition", 0x80000000, 0x01AC0000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + {"HLOS 1", 0x81AC0000, 0x03C40000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"Hypervisor", 0x85800000, 0x00600000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"MPSS_EFS", 0x85E00000, 0x00200000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"SMEM", 0x86000000, 0x00200000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, + {"TZ", 0x86200000, 0x00B00000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"TZApps", 0x86D00000, 0x02200000, NoHob, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"HLOS 2", 0x88F00000, 0x01C00000, NoHob, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"PIL_REGION", 0x8AB00000, 0x0B315000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, + {"HLOS 3", 0x95E15000, 0x075EB000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + {"Display Reserved", 0x9D400000, 0x02400000, AddMem, MEM_RES, WRITE_THROUGH,MaxMem, WRITE_THROUGH}, + {"DBI Dump", 0x9D330000, 0x000D0000, NoHob, MMAP_IO, INITIALIZED, Conv, NS_DEVICE}, + {"DXE Heap", 0x97C00000, 0x05800000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK}, + {"FV Region", 0x9F800000, 0x00200000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"ABOOT FV", 0x9FA00000, 0x00200000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, + {"UEFI FD", 0x9FC00000, 0x00300000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK}, + {"SEC Heap", 0x9FF00000, 0x0008C000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"CPU Vectors", 0x9FF8C000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK}, + {"MMU PageTables", 0x9FF8D000, 0x00003000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"UEFI Stack", 0x9FF90000, 0x00040000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"RSRV1", 0x9FFD0000, 0x0000A000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"TPMControl", 0x9FFDA000, 0x00003000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, UNCACHED_UNBUFFERED_XN}, + {"Reset Data", 0x9FFDD000, 0x00004000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, UNCACHED_UNBUFFERED_XN}, + {"RSRV3", 0x9FFE1000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"Capsule Header", 0x9FFE2000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, UNCACHED_UNBUFFERED_XN}, + {"RSRV2", 0x9FFE3000, 0x00014000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"Log Buffer", 0x9FFF7000, 0x00008000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"Info Blk", 0x9FFFF000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, +// {"RAM Partition", 0xA0000000, 0xDE4C0000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + + // Other memory regions + {"IMEM Base", 0x14680000, 0x00040000, NoHob, MMAP_IO, INITIALIZED, Conv, NS_DEVICE}, + {"IMEM Cookie Base", 0x146BF000, 0x00001000, AddDev, MMAP_IO, INITIALIZED, Conv, NS_DEVICE}, + {"QDSS_STM", 0x16000000, 0x01000000, AddDev, MMAP_IO, INITIALIZED, Conv, NS_DEVICE}, + + // Register regions + {"BOOT_CONFIG", 0x00070000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"GCC CLK CTL", 0x00100000, 0x000B0000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"UFS_RUMI", 0x00620000, 0x00020000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"RPM MSG RAM", 0x00778000, 0x00008000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"SECURITY CONTROL", 0x00780000, 0x00007000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"PRNG_CFG_PRNG", 0x00790000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MPM2_SLP_CNTR", 0x010A3000, 0x00001000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MPM2_TSENS0", 0x010AA000, 0x00001000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MPM2_TSENS0_TM", 0x010AB000, 0x00001000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MPM2_PSHOLD", 0x010AC000, 0x00001000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MPM2_TSENS1", 0x010AD000, 0x00001000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MPM2_TSENS1_TM", 0x010AE000, 0x00001000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"A1_NOC", 0x01680000, 0x00009000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"PCIE WRAPPER AHB", 0x01C00000, 0x00007000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"UFS UFS REGS", 0x01DA0000, 0x00020000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"CRYPTO0 CRYPTO", 0x01DC0000, 0x00040000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"TCSR_TCSR_REGS", 0x01FC0000, 0x00026000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"TLMM CSR", 0x03400000, 0x00C00000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"GPMU_DRAM", 0x05026000, 0x00002000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"GPMU_BLOCK0", 0x0502A000, 0x00002000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"GPU_ISENSE", 0x05030000, 0x00002000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"GPUCC", 0x05065000, 0x00009000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"QDSS_QDSS", 0x06000000, 0x00100000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"HMSS_QLL", 0x06400000, 0x00200000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"PMIC ARB SPMI", 0x08000000, 0x02800000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"USB30_PRIM", 0x0A800000, 0x0011B000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"USB_RUMI", 0x0A920000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"PERIPH_SS", 0x0C000000, 0x00200000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"MMSS", 0x0C800000, 0x00800000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"APCS_CC", 0x17800000, 0x00100000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"QTIMER", 0x17900000, 0x00030000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"APCS_GIC500_GICD", 0x17A00000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"APCS_GIC500_GICR", 0x17B00000, 0x00100000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"APCS_GIC500_GICC", 0x17C00000, 0x00040000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"PCIE WRAPPER AXI", 0x1B000000, 0x01000000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + + // Terminator for MMU + {"Terminator", 0, 0, 0, 0, 0, 0, 0} +}; + +ARM_MEMORY_REGION_DESCRIPTOR_EX* +GetDeviceMemoryMap () +{ + return gDeviceMemoryDescriptorEx; +} diff --git a/Platforms/Xiaomi/sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.inf b/Platforms/Xiaomi/sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.inf new file mode 100644 index 000000000..696cb0fa5 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.inf @@ -0,0 +1,15 @@ +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = DeviceMemoryMapLib + FILE_GUID = 375C4FF0-1905-4BA7-A5CA-7D40D25F5EF3 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = DeviceMemoryMapLib + +[Sources] + DeviceMemoryMapLib.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + SiliciumPkg/SiliciumPkg.dec diff --git a/Platforms/Xiaomi/sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.c b/Platforms/Xiaomi/sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.c new file mode 100644 index 000000000..a1f20b2f7 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.c @@ -0,0 +1,4 @@ +#include + +VOID +DeviceInitialize () {} diff --git a/Platforms/Xiaomi/sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.inf b/Platforms/Xiaomi/sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.inf new file mode 100644 index 000000000..074a306f0 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.inf @@ -0,0 +1,14 @@ +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = DevicePrePiLib + FILE_GUID = 59C11815-F8DA-4F49-B4FB-EC1E41ED1F07 + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + LIBRARY_CLASS = DevicePrePiLib + +[Sources] + DevicePrePiLib.c + +[Packages] + MdePkg/MdePkg.dec + SiliciumPkg/SiliciumPkg.dec diff --git a/Platforms/Xiaomi/sagitPkg/PlatformBuild.py b/Platforms/Xiaomi/sagitPkg/PlatformBuild.py new file mode 100644 index 000000000..eeb998cee --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/PlatformBuild.py @@ -0,0 +1,207 @@ +## +# Copyright (c) Microsoft Corporation. +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +import datetime +import logging +import os +import uuid + +from io import StringIO +from pathlib import Path + +from edk2toolext.environment import shell_environment +from edk2toolext.environment.uefi_build import UefiBuilder +from edk2toolext.invocables.edk2_platform_build import BuildSettingsManager +from edk2toolext.invocables.edk2_pr_eval import PrEvalSettingsManager +from edk2toolext.invocables.edk2_setup import (RequiredSubmodule, SetupSettingsManager) +from edk2toolext.invocables.edk2_update import UpdateSettingsManager +from edk2toolext.invocables.edk2_parse import ParseSettingsManager +from edk2toollib.utility_functions import RunCmd + +# ####################################################################################### # +# Common Configuration # +# ####################################################################################### # +class CommonPlatform (): + PackagesSupported = ("sagitPkg") + ArchSupported = ("AARCH64") + TargetsSupported = ("DEBUG", "RELEASE") + Scopes = ('sagit', 'gcc_aarch64_linux', 'edk2-build') + WorkspaceRoot = os.path.dirname(os.path.dirname(os.path.dirname(os.path.dirname(os.path.abspath(__file__))))) + PackagesPath = ( + "Platforms/Xiaomi", + "Common/Mu", + "Common/Mu_OEM_Sample", + "Common/Mu_Tiano_Plus", + "Features/DFCI", + "Mu_Basecore", + "Silicon/Arm/Mu_Tiano", + "Silicon/Qualcomm", + "Silicon/Silicium", + "Silicium-ACPI/Platforms/Xiaomi", + "Silicium-ACPI/SoCs/Qualcomm" + ) + +# ####################################################################################### # +# Configuration for Update & Setup # +# ####################################################################################### # +class SettingsManager (UpdateSettingsManager, SetupSettingsManager, PrEvalSettingsManager, ParseSettingsManager): + + def GetPackagesSupported (self): + return CommonPlatform.PackagesSupported + + def GetArchitecturesSupported (self): + return CommonPlatform.ArchSupported + + def GetTargetsSupported (self): + return CommonPlatform.TargetsSupported + + def GetRequiredSubmodules (self): + return [ + RequiredSubmodule ("Binaries", True), + RequiredSubmodule ("Common/Mu", True), + RequiredSubmodule ("Common/Mu_OEM_Sample", True), + RequiredSubmodule ("Common/Mu_Tiano_Plus", True), + RequiredSubmodule ("Features/DFCI", True), + RequiredSubmodule ("Mu_Basecore", True), + RequiredSubmodule ("Silicon/Arm/Mu_Tiano", True), + RequiredSubmodule ("Silicium-ACPI", True), + ] + + def SetArchitectures (self, list_of_requested_architectures): + unsupported = set(list_of_requested_architectures) - set(self.GetArchitecturesSupported()) + + if (len(unsupported) > 0): + errorString = ("Unsupported Architecture Requested: " + " ".join(unsupported)) + logging.critical (errorString) + raise Exception (errorString) + + self.ActualArchitectures = list_of_requested_architectures + + def GetWorkspaceRoot (self): + return CommonPlatform.WorkspaceRoot + + def GetActiveScopes (self): + return CommonPlatform.Scopes + + def FilterPackagesToTest (self, changedFilesList: list, potentialPackagesList: list) -> list: + build_these_packages = [] + possible_packages = potentialPackagesList.copy () + + for f in changedFilesList: + if "BaseTools" in f: + if os.path.splitext(f) not in [".txt", ".md"]: + build_these_packages = possible_packages + break + + if "platform-build-run-steps.yml" in f: + build_these_packages = possible_packages + break + + return build_these_packages + + def GetPlatformDscAndConfig (self) -> tuple: + return ("sagitPkg/sagit.dsc", {}) + + def GetName (self): + return "sagit" + + def GetPackagesPath (self): + return CommonPlatform.PackagesPath + +# ####################################################################################### # +# Actual Configuration for Platform Build # +# ####################################################################################### # +class PlatformBuilder (UefiBuilder, BuildSettingsManager): + def __init__ (self): + UefiBuilder.__init__ (self) + + def AddCommandLineOptions (self, parserObj): + parserObj.add_argument('-a', "--arch", dest="build_arch", type=str, default="AARCH64", help="Optional - CSV of architecture to build. AARCH64 is used for PEI and DXE and is the only valid option for this platform.") + + def RetrieveCommandLineOptions (self, args): + if args.build_arch.upper() != "AARCH64": + raise Exception("Invalid Arch Specified. Please see comments in PlatformBuild.py::PlatformBuilder::AddCommandLineOptions") + + def GetWorkspaceRoot (self): + return CommonPlatform.WorkspaceRoot + + def GetPackagesPath (self): + result = [ shell_environment.GetBuildVars().GetValue("FEATURE_CONFIG_PATH", "") ] + + for a in CommonPlatform.PackagesPath: + result.append(a) + + return result + + def GetActiveScopes (self): + return CommonPlatform.Scopes + + def GetName (self): + return "sagitPkg" + + def GetLoggingLevel (self, loggerType): + return logging.INFO + return super().GetLoggingLevel(loggerType) + + def SetPlatformEnv (self): + logging.debug ("PlatformBuilder SetPlatformEnv") + + self.env.SetValue ("PRODUCT_NAME", "sagit", "Platform Hardcoded") + self.env.SetValue ("ACTIVE_PLATFORM", "sagitPkg/sagit.dsc", "Platform Hardcoded") + self.env.SetValue ("TARGET_ARCH", "AARCH64", "Platform Hardcoded") + self.env.SetValue ("TOOL_CHAIN_TAG", "CLANGPDB", "set default to clangpdb") + self.env.SetValue ("EMPTY_DRIVE", "FALSE", "Default to false") + self.env.SetValue ("RUN_TESTS", "FALSE", "Default to false") + self.env.SetValue ("SHUTDOWN_AFTER_RUN", "FALSE", "Default to false") + self.env.SetValue ("BLD_*_BUILDID_STRING", "Unknown", "Default") + self.env.SetValue ("BUILDREPORTING", "TRUE", "Enabling build report") + self.env.SetValue ("BUILDREPORT_TYPES", "PCD DEPEX FLASH BUILD_FLAGS LIBRARY FIXED_ADDRESS HASH", "Setting build report types") + self.env.SetValue ("BLD_*_MEMORY_PROTECTION", "TRUE", "Default") + self.env.SetValue ("BLD_*_SHIP_MODE", "FALSE", "Default") + self.env.SetValue ("BLD_*_FD_BASE", self.env.GetValue("FD_BASE"), "Default") + self.env.SetValue ("BLD_*_FD_SIZE", self.env.GetValue("FD_SIZE"), "Default") + self.env.SetValue ("BLD_*_FD_BLOCKS", self.env.GetValue("FD_BLOCKS"), "Default") + + return 0 + + def PlatformPreBuild (self): + return 0 + + def PlatformPostBuild (self): + return 0 + + def FlashRomImage (self): + return 0 + +if __name__ == "__main__": + import argparse + import sys + + from edk2toolext.invocables.edk2_platform_build import Edk2PlatformBuild + from edk2toolext.invocables.edk2_setup import Edk2PlatformSetup + from edk2toolext.invocables.edk2_update import Edk2Update + + SCRIPT_PATH = os.path.relpath (__file__) + + parser = argparse.ArgumentParser (add_help=False) + + parse_group = parser.add_mutually_exclusive_group() + + parse_group.add_argument ("--update", "--UPDATE", action='store_true', help="Invokes stuart_update") + parse_group.add_argument ("--setup", "--SETUP", action='store_true', help="Invokes stuart_setup") + + args, remaining = parser.parse_known_args() + + new_args = ["stuart", "-c", SCRIPT_PATH] + new_args = new_args + remaining + + sys.argv = new_args + + if args.setup: + Edk2PlatformSetup().Invoke() + elif args.update: + Edk2Update().Invoke() + else: + Edk2PlatformBuild().Invoke() diff --git a/Platforms/Xiaomi/sagitPkg/sagit.dec b/Platforms/Xiaomi/sagitPkg/sagit.dec new file mode 100644 index 000000000..e69de29bb diff --git a/Platforms/Xiaomi/sagitPkg/sagit.dsc b/Platforms/Xiaomi/sagitPkg/sagit.dsc new file mode 100644 index 000000000..c9331b3c6 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/sagit.dsc @@ -0,0 +1,85 @@ +## +# Copyright (c) 2011 - 2022, ARM Limited. All rights reserved. +# Copyright (c) 2014, Linaro Limited. All rights reserved. +# Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved. +# Copyright (c) 2018, Bingxing Wang. All rights reserved. +# Copyright (c) Microsoft Corporation. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = sagit + PLATFORM_GUID = d5ba83ff-c475-41c2-9f0e-4b5621458657 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/sagitPkg + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = RELEASE|DEBUG + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sagitPkg/sagit.fdf + USE_CUSTOM_DISPLAY_DRIVER = 0 + HAS_BUILD_IN_KEYBOARD = 0 + +[BuildOptions] + *_*_*_CC_FLAGS = -DHAS_BUILD_IN_KEYBOARD=$(HAS_BUILD_IN_KEYBOARD) + +[LibraryClasses] + DeviceMemoryMapLib|sagitPkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.inf + DeviceConfigurationMapLib|sagitPkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.inf + DevicePrePiLib|sagitPkg/Library/DevicePrePiLib/DevicePrePiLib.inf + +[PcdsFixedAtBuild] + # DDR Start Address + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 + + # Device Maintainer + gSiliciumPkgTokenSpaceGuid.PcdDeviceMaintainer|"ivnvrvnn" + + # CPU Vector Address + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x9FF8C000 + + # UEFI Stack Addresses + gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x9FF90000 + gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x00040000 + + # SmBios + gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemVendor|"Xiaomi" + gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemModel|"Mi 6" + gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemRetailModel|"sagit" + gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemRetailSku|"Mi_6_sagit" + gSiliciumPkgTokenSpaceGuid.PcdSmbiosBoardModel|"Mi 6" + + # Simple FrameBuffer + gSiliciumPkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gSiliciumPkgTokenSpaceGuid.PcdMipiFrameBufferHeight|1920 + gSiliciumPkgTokenSpaceGuid.PcdMipiFrameBufferColorDepth|32 + + # Platform Pei + gQcomPkgTokenSpaceGuid.PcdPlatformType|"LA" + + # Dynamic RAM Start Address + gQcomPkgTokenSpaceGuid.PcdRamPartitionBase|0xA0000000 + + # SD Card Slot + gQcomPkgTokenSpaceGuid.PcdInitCardSlot|FALSE + + # USB Controller + gQcomPkgTokenSpaceGuid.PcdStartUsbController|TRUE + +[PcdsDynamicDefault] + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1080 + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|1920 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|1080 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|1920 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|135 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|101 + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|135 + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|101 + +!include MSM8998Pkg/MSM8998Pkg.dsc.inc diff --git a/Platforms/Xiaomi/sagitPkg/sagit.fdf b/Platforms/Xiaomi/sagitPkg/sagit.fdf new file mode 100644 index 000000000..0769add76 --- /dev/null +++ b/Platforms/Xiaomi/sagitPkg/sagit.fdf @@ -0,0 +1,136 @@ +## +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.sagit_UEFI] +BaseAddress = $(FD_BASE)|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the FLASH Device. +Size = $(FD_SIZE)|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x1000 +NumBlocks = $(FD_BLOCKS) + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +0x00000000|$(FD_SIZE) +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +FvNameGuid = 631008B0-B2D1-410A-8B49-2C5C4D8ECC7E +BlockSize = 0x1000 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + !include Include/APRIORI.inc + !include Include/DXE.inc + !include Include/RAW.inc + + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + # BDS + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + + # ACPI and SMBIOS + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MSM8998Pkg/Drivers/SmBiosTableDxe/SmBiosTableDxe.inf + + # ACPI Tables + !include Include/ACPI.inc + + INF DfciPkg/IdentityAndAuthManager/IdentityAndAuthManagerDxe.inf + + !include QcomPkg/Extra.fdf.inc + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF SiliciumPkg/PrePi/PrePi.inf + + FILE FREEFORM = DDE58710-41CD-4306-DBFB-3FA90BB1D2DD { + SECTION UI = "uefiplat.cfg" + SECTION RAW = Binaries/poplar/RawFiles/uefiplat.cfg + } + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + + !include SiliciumPkg/Common.fdf.inc diff --git a/Resources/Configs/sagit.conf b/Resources/Configs/sagit.conf new file mode 100644 index 000000000..26274a615 --- /dev/null +++ b/Resources/Configs/sagit.conf @@ -0,0 +1,17 @@ +# General Configs +TARGET_DEVICE_VENDOR="Xiaomi" +TARGET_MULTIPLE_MODELS=0 +TARGET_NUMBER_OF_MODELS=0 + +# BootShim Configs +TARGET_REQUIRES_BOOTSHIM=1 +TARGET_FD_BASE=0x9FC00000 +TARGET_FD_SIZE=0x00300000 +TARGET_FD_BLOCKS=0x300 + +# Arch Config +TARGET_ARCH="AARCH64" + +# FDT Configs +TARGET_CREATE_POINTER=0 +TARGET_POINTER_ADDRESS=0x0 diff --git a/Resources/DTBs/sagit.dtb b/Resources/DTBs/sagit.dtb new file mode 100644 index 000000000..d1b6a6a53 Binary files /dev/null and b/Resources/DTBs/sagit.dtb differ diff --git a/Resources/Pictures/Xiaomi-Mi-6.png b/Resources/Pictures/Xiaomi-Mi-6.png new file mode 100644 index 000000000..f7ce6e2a1 Binary files /dev/null and b/Resources/Pictures/Xiaomi-Mi-6.png differ diff --git a/Resources/Scripts/sagit.sh b/Resources/Scripts/sagit.sh new file mode 100644 index 000000000..b35452a05 --- /dev/null +++ b/Resources/Scripts/sagit.sh @@ -0,0 +1,19 @@ +#!/bin/bash + +# Build an Android kernel that is actually UEFI disguised as the Kernel +cat ./BootShim/AARCH64/BootShim.bin "./Build/sagitPkg/${_TARGET_BUILD_MODE}_CLANGPDB/FV/SAGIT_UEFI.fd" > "./Build/sagitPkg/${_TARGET_BUILD_MODE}_CLANGPDB/FV/SAGIT_UEFI.fd-bootshim"||exit 1 +gzip -c < "./Build/sagitPkg/${_TARGET_BUILD_MODE}_CLANGPDB/FV/SAGIT_UEFI.fd-bootshim" > "./Build/sagitPkg/${_TARGET_BUILD_MODE}_CLANGPDB/FV/SAGIT_UEFI.fd-bootshim.gz"||exit 1 +cat "./Build/sagitPkg/${_TARGET_BUILD_MODE}_CLANGPDB/FV/SAGIT_UEFI.fd-bootshim.gz" ./Resources/DTBs/sagit.dtb > ./Resources/bootpayload.bin||exit 1 + +# Create bootable Android boot.img +python3 ./Resources/Scripts/mkbootimg.py \ + --kernel ./Resources/bootpayload.bin \ + --ramdisk ./Resources/ramdisk \ + --kernel_offset 0x00000000 \ + --ramdisk_offset 0x00000000 \ + --tags_offset 0x00000000 \ + --os_version 13.0.0 \ + --os_patch_level "$(date '+%Y-%m')" \ + --header_version 1 \ + -o Mu-sagit.img \ + ||_error "\nFailed to create Android Boot Image!\n" diff --git a/Status.md b/Status.md index 1bd2f31be..0a7b4d2e4 100755 --- a/Status.md +++ b/Status.md @@ -1511,6 +1511,107 @@ | Display | | ✅ | | Vibration | | ❌ | + + +## Xiaomi Mi 6 + +Preview + +**State: Active**
+**Codename: sagit**
+**Maintainer: ivnvrvnn**
+**Contributors: ivnvrvnn**
+**Tester: ivnvrvnn** + +### UEFI Status + +| Feature | Description | State | +|:-------------------|:-------------------------|:-----:| +| Display | | ✅ | +| Internal Storage | | ✅ | +| Side Buttons | | ❔ | +| USB Host Mode | | ✅ | +| USB Device Mode | | ❔ | +| USB Power Delivery | | ❔ | +| Mass Storage | | ❌ | +| SD Card | Mi 6 doesn't have sd slot| ❔ | +| Windows Boot | | ❌ | +| Linux Boot | | ❌ | + +### OS Status + + + +
WindowsLinux
+ +> NOTE: Needs Windows Drivers! + +| Feature | Description | State | +|:---------------------|:--------------------------|:-----:| +| Internal Storage | | ❌ | +| SD Card | | ❌ | +| Side Buttons | | ❌ | +| Proximity Sensor | | ❌ | +| Light Sensor | | ❌ | +| Accelerometer Sensor | | ❌ | +| Compass Sensor | | ❌ | +| Fingerprint Sensor | | ❌ | +| Hall Sensor | | ❌ | +| NFC Sensor | | ❌ | +| Temperature Sensor | | ❌ | +| Battery | | ❌ | +| USB Host Mode | | ❌ | +| USB Device Mode | | ❌ | +| USB Power Delivery | | ❌ | +| Charging | | ❌ | +| WLAN | | ❌ | +| CPU | | ❌ | +| Touchscreen | | ❌ | +| Bluetooth | | ❌ | +| GPS | | ❌ | +| Speakers | | ❌ | +| 3.5mm Audio Jack | | ❌ | +| Microphone | | ❌ | +| GPU | | ❌ | +| Camera | | ❌ | +| Mobile Data | | ❌ | +| Display | | ❌ | +| Vibration | | ❌ | + + + +| Feature | Description | State | +|:---------------------|:--------------------------|:-----:| +| Internal Storage | | ❌ | +| SD Card | | ❌ | +| Side Buttons | | ❌ | +| Proximity Sensor | | ❌ | +| Light Sensor | | ❌ | +| Accelerometer Sensor | | ❌ | +| Compass Sensor | | ❌ | +| Fingerprint Sensor | | ❌ | +| Hall Sensor | | ❌ | +| NFC Sensor | | ❌ | +| Temperature Sensor | | ❌ | +| Battery | | ❌ | +| USB Host Mode | | ❌ | +| USB Device Mode | | ❌ | +| USB Power Delivery | | ❌ | +| Charging | | ❌ | +| WLAN | | ❌ | +| CPU | | ❌ | +| Touchscreen | | ❌ | +| Bluetooth | | ❌ | +| GPS | | ❌ | +| Speakers | | ❌ | +| 3.5mm Audio Jack | | ❌ | +| Microphone | | ❌ | +| GPU | | ❌ | +| Camera | | ❌ | +| Mobile Data | | ❌ | +| Display | | ❌ | +| Vibration | | ❌ | +