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fmv_x_hw.adoc

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th.fmv.x.hw

Synopsis

Read double-precision floating-point high-bit data

Mnemonic

th.fmv.x.hw rd, fs1

Encoding
{reg:[
    { bits:  7, name: 0xb, attr: ['custom-0, 32 bit'] },
    { bits:  5, name: 'rd' },
    { bits:  3, name: 0x1 },
    { bits:  5, name: 'fs1' },
    { bits:  5, name: 0x0 },
    { bits:  7, name: 0x50 },
]}
Description

This instruction stores the upper 32-bit of the specified double-precision FP register fs1 in the specified 32-bit GP register rd.

Operation
rd := fs1[63:32]
Permission

This instruction can be executed in all privilege levels.

Exceptions

This instruction does not trigger any exceptions.

Included in
Extension

XTheadFmv ([xtheadfmv])