Successfully simulated on PythonSim and CPPSim but failed at RtlSIm

[LeatherE]

Hi,

We are implementing our Keyword Spotting model following your end2end flow. But we faced a problem that we will fail at generating the result from driver.py after we deployed on FPGA(ZCU104). it will just hang there without generating any result. In addition, when we used the end2end_verification example you provided, we could successfully generate the results using PythonSim and CPPSim but failed at RtlSim. Will it be a problem with the Vivado HLS tool(2019.1) or PyVerilator? Can anyone give us any suggestions about this problem?

The following link contains our notebook file and KWS model.
https://github.com/LeatherE/FINN_KWS
Thanks

[maltanar]

Hi @LeatherE , if you're still having trouble with this, can you re-try with the latest (v0.7) release?

I didn't have a chance to go through the notebook you shared yet, but it may be worth checking if some nodes in your network aren't converted to HLS. If so, they will be left out of the graph after the dataflow partitioning stage, and that will lead to different behavior vs. the original network (i.e. any parts that were left out have to be executed in software or similar as pre/post-processing).