From df6b61e0affdbf23602360e54f4b5cb8be7f4b27 Mon Sep 17 00:00:00 2001 From: Jan Drewniok <97012901+Drewniok@users.noreply.github.com> Date: Tue, 17 Dec 2024 10:49:20 +0100 Subject: [PATCH] =?UTF-8?q?=E2=9C=A8=20Added=20rectangular=20skeletons=20(?= =?UTF-8?q?16.896=20nm=20x=2016.896=20nm)=20with=20design=20script.=20(#60?= =?UTF-8?q?0)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * :inbox_tray: add rectangular skeletons. * :alembic: added experiment to design rectangular 2-input gate library. * 🎨 Incorporated pre-commit fixes * :memo: update changelog.rst * :art: implement Marcel's feedback. * 🎨 Incorporated pre-commit fixes * :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --------- Signed-off-by: GitHub Actions Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com> Co-authored-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 222 ------------------ docs/changelog.rst | 1 + .../rectangular_1i_left_1o_right.sqd | 145 ++++++++++++ .../rectangular_1i_top_1o_down.sqd | 145 ++++++++++++ .../rectangular_1i_top_1o_right.sqd | 145 ++++++++++++ .../rectangular_1i_top_2o_left_right.sqd | 177 ++++++++++++++ .../rectangular_1i_top_2o_right_down.sqd | 177 ++++++++++++++ .../rectangular_2i_top_left_1o_right.sqd | 183 +++++++++++++++ .../rectangular_2i_top_left_2o_down_right.sqd | 215 +++++++++++++++++ .../quickcell_rectangular_gate_library.cpp | 182 ++++++++++++++ 10 files changed, 1370 insertions(+), 222 deletions(-) create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_left_1o_right.sqd create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_down.sqd create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_right.sqd create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_left_right.sqd create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_right_down.sqd create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_1o_right.sqd create mode 100644 experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_2o_down_right.sqd create mode 100644 experiments/quickcell/quickcell_rectangular_gate_library.cpp diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 3cdf9930c..2f8cdd768 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -1122,56 +1122,6 @@ static const char *__doc_fiction_bounding_box_2d_x_size = R"doc(The horizontal s static const char *__doc_fiction_bounding_box_2d_y_size = R"doc(The vertical size of the bounding box in layout coordinates.)doc"; -static const char *__doc_fiction_branching_signal_container = -R"doc(A container class to help identify layout locations of branching nodes -like fanouts. When a node from a network is to placed in a layout, -fetching the node's fanins and looking for their locations in the -layout does not work properly when branching nodes like fanouts are -involved that got extended by wire nodes. This container solves that -issue. - -Template parameter ``Lyt``: - Gate-level layout type. - -Template parameter ``Ntk``: - Logic network type. - -Template parameter ``fanout_size``: - Maximum fanout size possible in the layout and/or the network.)doc"; - -static const char *__doc_fiction_branching_signal_container_branches = R"doc(Storage for all branches.)doc"; - -static const char *__doc_fiction_branching_signal_container_branching_signal = R"doc(Branch type.)doc"; - -static const char *__doc_fiction_branching_signal_container_branching_signal_branching_signal = R"doc()doc"; - -static const char *__doc_fiction_branching_signal_container_branching_signal_lyt_signal = R"doc()doc"; - -static const char *__doc_fiction_branching_signal_container_branching_signal_ntk_node = R"doc()doc"; - -static const char *__doc_fiction_branching_signal_container_operator_array = -R"doc(Accesses the branching container to find the location of a given node -`n`. Returns the signal to that location if it was already stored or -the default signal, otherwise. - -Parameter ``n``: - Node whose branching position is desired. - -Returns: - Signal to `n`'s layout location or the default signal if it wasn't - found.)doc"; - -static const char *__doc_fiction_branching_signal_container_update_branch = -R"doc(Updates the given node's branch by another layout signal, thereby, -creating a new branch or updating the position of an existing one, -e.g., if further wire segments were moving the head of the branch. - -Parameter ``ntk_node``: - Node whose branch is to be updated. - -Parameter ``lyt_signal``: - New signal pointing to the end of the branch.)doc"; - static const char *__doc_fiction_calculate_energy_and_state_type_with_kinks_accepted = R"doc(This function takes in an SiDB energy distribution. For each charge distribution, the state type is determined (i.e. erroneous, @@ -10202,20 +10152,6 @@ Parameter ``lyt``: Returns: List of all routing objectives in the given layout.)doc"; -static const char *__doc_fiction_fanin_container = -R"doc(Container that stores fanins of a node in a network, including whether -one of them is a constant. - -Note that this container assumes that each node has a maximum of one -constant fanin. - -Template parameter ``Ntk``: - `mockturtle` network type.)doc"; - -static const char *__doc_fiction_fanin_container_constant_fanin = -R"doc(Has a value if a fanin node is constant. In that case, it represents -the constant value.)doc"; - static const char *__doc_fiction_fanin_edge_container = R"doc(Container that stores fanin edges of a node in a network, including whether one of them is a constant. @@ -15189,158 +15125,6 @@ static const char *__doc_fiction_path_set_add = R"doc()doc"; static const char *__doc_fiction_path_set_contains = R"doc()doc"; static const char *__doc_fiction_place = -R"doc(Place 0-input gates. - -Template parameter ``Lyt``: - Gate-level layout type. - -Template parameter ``Ntk``: - Logic network type. - -Parameter ``lyt``: - Gate-level layout in which to place a 0-input gate. - -Parameter ``t``: - Tile in `lyt` to place the gate onto. - -Parameter ``ntk``: - Network whose node is to be placed. - -Parameter ``n``: - Node in `ntk` to place onto `t` in `lyt`. - -Returns: - Signal pointing to the placed gate in `lyt`.)doc"; - -static const char *__doc_fiction_place_2 = -R"doc(Place 1-input gates. - -Template parameter ``Lyt``: - Gate-level layout type. - -Template parameter ``Ntk``: - Logic network type. - -Parameter ``lyt``: - Gate-level layout in which to place a 1-input gate. - -Parameter ``t``: - Tile in `lyt` to place the gate onto. - -Parameter ``ntk``: - Network whose node is to be placed. - -Parameter ``n``: - Node in `ntk` to place onto `t` in `lyt`. - -Parameter ``a``: - Incoming signal to the newly placed gate in `lyt`. - -Returns: - Signal pointing to the placed gate in `lyt`.)doc"; - -static const char *__doc_fiction_place_3 = -R"doc(Place 2-input gates. - -Template parameter ``Lyt``: - Gate-level layout type. - -Template parameter ``Ntk``: - Logic network type. - -Parameter ``lyt``: - Gate-level layout in which to place a 2-input gate. - -Parameter ``t``: - Tile in `lyt` to place the gate onto. - -Parameter ``ntk``: - Network whose node is to be placed. - -Parameter ``n``: - Node in `ntk` to place onto `t` in `lyt`. - -Parameter ``a``: - First incoming signal to the newly placed gate in `lyt`. - -Parameter ``b``: - Second incoming signal to the newly placed gate in `lyt`. - -Parameter ``c``: - Third optional incoming constant value signal to the newly placed - gate in `lyt`. Might change the gate function when set, e.g., from - a MAJ to an AND if `c == false`. - -Returns: - Signal pointing to the placed gate in `lyt`.)doc"; - -static const char *__doc_fiction_place_4 = -R"doc(Place 3-input gates. - -Template parameter ``Lyt``: - Gate-level layout type. - -Template parameter ``Ntk``: - Logic network type. - -Parameter ``lyt``: - Gate-level layout in which to place a 3-input gate. - -Parameter ``t``: - Tile in `lyt` to place the gate onto. - -Parameter ``ntk``: - Network whose node is to be placed. - -Parameter ``n``: - Node in `ntk` to place onto `t` in `lyt`. - -Parameter ``a``: - First incoming signal to the newly placed gate in `lyt`. - -Parameter ``b``: - Second incoming signal to the newly placed gate in `lyt`. - -Parameter ``c``: - Third incoming signal to the newly placed gate in `lyt`. - -Returns: - Signal pointing to the placed gate in `lyt`.)doc"; - -static const char *__doc_fiction_place_5 = -R"doc(Place any gate from a network. This function automatically identifies -the arity of the passed node and fetches its incoming signals from the -given network and a provided `mockturtle::node_map`. This function -does not update the `mockturtle::node_map`. - -Template parameter ``Lyt``: - Gate-level layout type. - -Template parameter ``Ntk``: - Logic network type. - -Parameter ``lyt``: - Gate-level layout in which to place any gate. - -Parameter ``t``: - Tile in `lyt` to place the gate onto. - -Parameter ``ntk``: - Network whose node is to be placed. - -Parameter ``n``: - Node in `ntk` to place onto `t` in `lyt`. - -Parameter ``node2pos``: - Mapping from network nodes to layout signals, i.e., a pointer to - their position in the layout. The map is used to fetch location of - the fanins. The `mockturtle::node_map` is not updated by this - function. - -Returns: - Signal to the newly placed gate in `lyt`.)doc"; - -static const char *__doc_fiction_place_6 = R"doc(Place any gate from a network. This function automatically identifies the arity of the passed node and fetches its incoming signals from the given network and a provided branching_signal_container @@ -19323,12 +19107,6 @@ static const char *__doc_fmt_formatter_parse = R"doc()doc"; static const char *__doc_fmt_formatter_parse_2 = R"doc()doc"; -static const char *__doc_fmt_unnamed_struct_at_home_runner_work_fiction_fiction_include_fiction_layouts_coordinates_hpp_1090_8 = R"doc()doc"; - -static const char *__doc_fmt_unnamed_struct_at_home_runner_work_fiction_fiction_include_fiction_layouts_coordinates_hpp_1106_8 = R"doc()doc"; - -static const char *__doc_fmt_unnamed_struct_at_home_runner_work_fiction_fiction_include_fiction_technology_cell_ports_hpp_291_8 = R"doc()doc"; - static const char *__doc_mockturtle_detail_foreach_element_if_transform = R"doc()doc"; static const char *__doc_mockturtle_edge = diff --git a/docs/changelog.rst b/docs/changelog.rst index f96fe4e76..0c552d6be 100644 --- a/docs/changelog.rst +++ b/docs/changelog.rst @@ -11,6 +11,7 @@ Unreleased Added ##### - Experiments: + - Added rectangular SiDB gate skeletons and a script for designing a corresponding library. - Added information about how many layouts remain after each of QuickCell's pruning steps. v0.6.6 - 2024-11-26 diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_left_1o_right.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_left_1o_right.sqd new file mode 100644 index 000000000..e092d35fd --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_left_1o_right.sqd @@ -0,0 +1,145 @@ + + + + + save + 0.3.3 + 2024-12-01 12:05:42 + + + + 0.0437881 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + + + + diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_down.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_down.sqd new file mode 100644 index 000000000..d39d8c309 --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_down.sqd @@ -0,0 +1,145 @@ + + + + + save + 0.3.3 + 2024-12-01 12:03:31 + + + + 0.0437881 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + + + + diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_right.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_right.sqd new file mode 100644 index 000000000..11086687a --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_1o_right.sqd @@ -0,0 +1,145 @@ + + + + + save + 0.3.3 + 2024-12-01 10:27:28 + + + + 0.0438559 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + + + + diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_left_right.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_left_right.sqd new file mode 100644 index 000000000..a342ef444 --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_left_right.sqd @@ -0,0 +1,177 @@ + + + + + save + 0.3.3 + 2024-12-01 11:27:40 + + + + 0.0390152 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + + + + diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_right_down.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_right_down.sqd new file mode 100644 index 000000000..ca9c96bf1 --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_1i_top_2o_right_down.sqd @@ -0,0 +1,177 @@ + + + + + save + 0.3.3 + 2024-12-01 11:14:15 + + + + 0.0358266 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + + + + diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_1o_right.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_1o_right.sqd new file mode 100644 index 000000000..0508d1095 --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_1o_right.sqd @@ -0,0 +1,183 @@ + + + + + save + 0.3.3 + 2024-12-01 10:20:31 + + + + 0.0315085 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + + + + diff --git a/experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_2o_down_right.sqd b/experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_2o_down_right.sqd new file mode 100644 index 000000000..80c1bea06 --- /dev/null +++ b/experiments/gate_skeletons/rectangular_skeletons/rectangular_2i_top_left_2o_down_right.sqd @@ -0,0 +1,215 @@ + + + + + save + 0.3.3 + 2024-12-01 10:13:49 + + + + 0.0338164 + + + + + + + + Lattice + Lattice + Design + 0 + 0 + 1 + 0 + + Si(100) 2x1 + + + 2 + + + + + + Screenshot Overlay + Misc + Overlay + 0 + 0 + 1 + 0 + + + Surface + DB + Design + 0 + 0 + 1 + 0 + + + Metal + Electrode + Design + 1000 + 100 + 1 + 0 + + + + + + + + + + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + input + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + output + + #ffc8c8c8 + + + 2 + + + #ffc8c8c8 + + + + + + diff --git a/experiments/quickcell/quickcell_rectangular_gate_library.cpp b/experiments/quickcell/quickcell_rectangular_gate_library.cpp new file mode 100644 index 000000000..6aab1af11 --- /dev/null +++ b/experiments/quickcell/quickcell_rectangular_gate_library.cpp @@ -0,0 +1,182 @@ +// +// Created by Jan Drewniok 01.12.24 +// + +#include "fiction_experiments.hpp" + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include + +// This script designs all gate implementations for 2-input Boolean functions using *QuickCell* and a 16.896 x 16.896 nm +// rectangular skeleton. + +using namespace fiction; + +int main() // NOLINT +{ + experiments::experiment + simulation_exp{"benchmark", + "gate", // std::string + "#Gates (QuickCell)", // uint64_t + "runtime (QuickCell) [s]", // double + "#Lp1", // uint64_t + "#Lp1/N [%]", // double + "#Lp2", // uint64_t + "#Lp2/N [%]", // double + "#Lp3", // uint64_t + "#Lp3/N [%]"}; // double + + const auto truth_tables_and_names = std::array, std::string>, 22>{ + {{std::vector{create_not_tt()}, "inv_1i_top_1o_right"}, + {std::vector{create_id_tt()}, "wire_1i_top_1o_right"}, + {std::vector{create_not_tt()}, "inv_1i_top_1o_down"}, + {std::vector{create_id_tt()}, "wire_1i_top_1o_down"}, + {std::vector{create_not_tt()}, "inv_1i_left_1o_right"}, + {std::vector{create_id_tt()}, "wire_1i_left_1o_right"}, + {create_fan_out_tt(), "fo2_1i_top_2o_left_right"}, + {create_fan_out_tt(), "fo2_1i_top_2o_right_down"}, + {std::vector{create_and_tt()}, "and_2i_top_left_1o_right"}, + {std::vector{create_nand_tt()}, "nand_2i_top_left_1o_right"}, + {std::vector{create_or_tt()}, "or_2i_top_left_1o_right"}, + {std::vector{create_nor_tt()}, "nor_2i_top_left_1o_right"}, + {std::vector{create_xor_tt()}, "xor_2i_top_left_1o_right"}, + {std::vector{create_xnor_tt()}, "xnor_2i_top_left_1o_right"}, + {std::vector{create_lt_tt()}, "lt_2i_top_left_1o_right"}, + {std::vector{create_gt_tt()}, "gt_2i_top_left_1o_right"}, + {std::vector{create_le_tt()}, "le_2i_top_left_1o_right"}, + {std::vector{create_ge_tt()}, "ge_2i_top_left_1o_right"}, + {std::vector{create_crossing_wire_tt()}, "cx_2i_top_left_2o_down_right"}, + {std::vector{create_half_adder_tt()}, "ha_2i_top_left_2o_down_right"}, + {std::vector{create_double_wire_tt()}, "hourglass_2i_top_left_2o_down_right"}}}; + + static const std::string folder = fmt::format("{}/gate_skeletons/rectangular_skeletons/", EXPERIMENTS_PATH); + + const auto rectangular_2i_top_left_2o_down_right = read_sqd_layout( + fmt::format("{}/{}", folder, "rectangular_2i_top_left_2o_down_right.sqd")); + + const auto rectangular_2i_top_left_1o_right = read_sqd_layout( + fmt::format("{}/{}", folder, "rectangular_2i_top_left_1o_right.sqd")); + + const auto rectangular_1i_top_1o_right = + read_sqd_layout(fmt::format("{}/{}", folder, "rectangular_1i_top_1o_right.sqd")); + + const auto rectangular_1i_top_1o_down = + read_sqd_layout(fmt::format("{}/{}", folder, "rectangular_1i_top_1o_down.sqd")); + + const auto rectangular_1i_left_1o_right = + read_sqd_layout(fmt::format("{}/{}", folder, "rectangular_1i_left_1o_right.sqd")); + + const auto rectangular_1i_top_2o_right_down = read_sqd_layout( + fmt::format("{}/{}", folder, "rectangular_1i_top_2o_right_down.sqd")); + + const auto rectangular_1i_top_2o_left_right = read_sqd_layout( + fmt::format("{}/{}", folder, "rectangular_1i_top_2o_left_right.sqd")); + + constexpr auto num_canvas_sidbs = 3u; + constexpr auto num_canvas_sidbs_2_input_2_output = 4u; + + design_sidb_gates_params> params{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, + bdl_input_iterator_params{{3}}, operational_condition::REJECT_KINKS}, + design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + {{18, 9, 0}, {26, 13, 0}}, + num_canvas_sidbs}; + + for (const auto& [truth_table, gate_name] : truth_tables_and_names) + { + std::vector quickcell_design{}; + design_sidb_gates_stats stats_quickcell{}; + + if (gate_name == "cx_2i_top_left_2o_down_right" || gate_name == "ha_2i_top_left_2o_down_right" || + gate_name == "hourglass_2i_top_left_2o_down_right") + { + params.number_of_sidbs = num_canvas_sidbs_2_input_2_output; + params.canvas = {{17, 8, 0}, {27, 14, 0}}; + quickcell_design = + design_sidb_gates(rectangular_2i_top_left_2o_down_right, truth_table, params, &stats_quickcell); + } + + else + { + params.number_of_sidbs = num_canvas_sidbs; + + if (gate_name == "fo2_1i_top_2o_left_right") + { + quickcell_design = + design_sidb_gates(rectangular_1i_top_2o_left_right, truth_table, params, &stats_quickcell); + } + + else if (gate_name == "fo2_1i_top_2o_right_down") + { + quickcell_design = + design_sidb_gates(rectangular_1i_top_2o_right_down, truth_table, params, &stats_quickcell); + } + + else if (gate_name == "wire_1i_top_1o_right" || gate_name == "inv_1i_top_1o_right") + { + quickcell_design = + design_sidb_gates(rectangular_1i_top_1o_right, truth_table, params, &stats_quickcell); + } + + else if (gate_name == "wire_1i_top_1o_down" || gate_name == "inv_1i_top_1o_down") + { + quickcell_design = design_sidb_gates(rectangular_1i_top_1o_down, truth_table, params, &stats_quickcell); + } + + else if (gate_name == "wire_1i_left_1o_right" || gate_name == "inv_1i_left_1o_right") + { + quickcell_design = + design_sidb_gates(rectangular_1i_left_1o_right, truth_table, params, &stats_quickcell); + } + + else + { + quickcell_design = + design_sidb_gates(rectangular_2i_top_left_1o_right, truth_table, params, &stats_quickcell); + } + } + + // Write the layout to a file + write_sqd_layout(quickcell_design.front(), fmt::format("{}/{}", folder, gate_name + ".sqd")); + + const auto runtime_quickcell = mockturtle::to_seconds(stats_quickcell.time_total); + + const auto total_number_of_layout = stats_quickcell.number_of_layouts; + + simulation_exp(gate_name, quickcell_design.size(), runtime_quickcell, + stats_quickcell.number_of_layouts_after_first_pruning, + static_cast(stats_quickcell.number_of_layouts_after_first_pruning) / + static_cast(total_number_of_layout) * 100, + stats_quickcell.number_of_layouts_after_second_pruning, + static_cast(stats_quickcell.number_of_layouts_after_second_pruning) / + static_cast(total_number_of_layout) * 100, + stats_quickcell.number_of_layouts_after_third_pruning, + static_cast(stats_quickcell.number_of_layouts_after_third_pruning) / + static_cast(total_number_of_layout) * 100); + + simulation_exp.save(); + simulation_exp.table(); + } + + simulation_exp.save(); + simulation_exp.table(); + + return EXIT_SUCCESS; +}