diff --git "a/src/p\303\251riph\303\251riques/communication-serie/UART8250.md" "b/src/p\303\251riph\303\251riques/communication-serie/UART8250.md"
index ad1980c..73d6e91 100644
--- "a/src/p\303\251riph\303\251riques/communication-serie/UART8250.md"
+++ "b/src/p\303\251riph\303\251riques/communication-serie/UART8250.md"
@@ -1,4 +1,4 @@
-# UART8250 / UART16750
+# UART8250 / UART16550
@@ -13,6 +13,7 @@
| 0x0 (DLAB == 0) | Transmit Holding Register (THR) | ✔️ | ❌ |
| 0x0 (DLAB == 0) | Receive Buffer Register (RBR) | ❌ | ✔️ |
| 0x1 (DLAB == 0) | Interrupt Enable Register (IER) | ✔️ | ✔️ |
+| 0x2 (⚠️UART16550 seulement) | FIFO Control Register (FCR) | ✔️ | ❌ |
| 0x2 | Interrupt Identification Register (IIR) | ❌ | ✔️ |
| 0x3 | Line Control Register (LCR) | ✔️ | ✔️ |
| 0x4 | Modem Control Register (MCR) | ✔️ | ✔️ |
@@ -99,4 +100,5 @@ Partons du principe que nous avont `uart8250_write` permetant d'ecrire une valeu
## Références
-- [Datasheet](https://web.archive.org/web/20160503070506/http://archive.pcjs.org/pubs/pc/datasheets/8250A-UART.pdf)
\ No newline at end of file
+- [8250A UART datasheet](https://web.archive.org/web/20160503070506/http://archive.pcjs.org/pubs/pc/datasheets/8250A-UART.pdf)
+- [PC16550D UART datasheet](https://web.archive.org/web/20180826215135/http://www.ti.com/lit/ds/symlink/pc16550d.pdf)
\ No newline at end of file