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For Arm M-class target systems, it is often possible to read the memory-mapped target registers while the CPU is running.
It would be good enable such functionality in the Peripheral Inspector.
There are two sub-scenarios for this:
Periodically update the view contents only while the CPU is running. This is to get peripheral insights of snapshots in time.
Periodically update the view contents also while the CPU is in debug halt. This is to monitor peripheral states if peripherals remain active while the CPU is in debug halt. This can also help to catch side effects by other interaction with the system in debug halt.
We should make the behavior configurable. Ideally per workspace. User extension settings might be "too global".
It would be useful to have that configurability close to the view itself. Similar things were done on the Memory Inspector. A more lightweight approach (e.g. context menu driven only) should be sufficient though.
The text was updated successfully, but these errors were encountered:
jreineckearm
changed the title
Allow periodic update while target CPU is running
Allow periodic updates (running and stopped CPU)
Dec 17, 2024
Type: Feature Request
For Arm M-class target systems, it is often possible to read the memory-mapped target registers while the CPU is running.
It would be good enable such functionality in the Peripheral Inspector.
There are two sub-scenarios for this:
We should make the behavior configurable. Ideally per workspace. User extension settings might be "too global".
It would be useful to have that configurability close to the view itself. Similar things were done on the Memory Inspector. A more lightweight approach (e.g. context menu driven only) should be sufficient though.
The text was updated successfully, but these errors were encountered: