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usi_spi.cpp: bad workaround of USI5 errata #117

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eurol opened this issue Sep 27, 2019 · 0 comments
Open

usi_spi.cpp: bad workaround of USI5 errata #117

eurol opened this issue Sep 27, 2019 · 0 comments

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@eurol
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eurol commented Sep 27, 2019

We have some issue.

char x = 0x55;
SPI.begin();
spi_transmit(x);
spi_transmit(x);

SPI.end();
SPI.begin();
spi_transmit(x);
spi_transmit(x);

This code is not working since USI5 workaround sends 7 bits instead of 8 after spi_initialize() which makes bResetAdjust = USI5_ADJUST.
It is not clear for me when USI5 error appears. Does it appear only one time after MSU reset? Then spi_initialize() should not touch bResetAdjust if it was already used.
Also using such variable impacts on performance. Every call of spi_send() checks if needed to workaround this error.

I suggest another way.
When this error should appear we turn off MOSI and CLK, then writing 1 to USICNT, wait for transmit to complete and read incoming "byte". Then we turn on MOSI and CLK.
In such case our spi_send() looks shorter:

USICNT = 8;
while (!(USICTL1 & USIIFG)) {
    ; // wait for an USICNT to decrement to 0
}
return USISRL; // reading clears RXIFG flag

instead of

// SPI master generates one additional clock after module reset if USICKPH is set.
if ( bResetAdjust == USI5_ADJUST ) {
    USICNT=7;   // adjust first time send
    bResetAdjust = USI5_SENT;
}
else {
    USICNT = 8;
}

while (!(USICTL1 & USIIFG)) {
    ; // wait for an USICNT to decrement to 0
}
return USISRL; // reading clears RXIFG flag

So if someone can check what is needed to get USI5 the code can be improved.

eurol added a commit to eurol/msp430-lg-core that referenced this issue Sep 27, 2019
Issue energia#117 
Also 16-bit SPI data exchange is changed
spi_tx() call changed to spi_transmit() - it did not compiled at all
Need to check at different modes of SPI.
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