diff --git a/MIPS_MultiCycle.circ b/MIPS_MultiCycle.circ
index bb17e60..7d21da0 100644
--- a/MIPS_MultiCycle.circ
+++ b/MIPS_MultiCycle.circ
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,9 +159,9 @@ end TCL_Generic;
-
+
-
+
@@ -499,10 +499,6 @@ end TCL_Generic;
-
-
-
-
@@ -541,11 +537,20 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
@@ -983,7 +988,6 @@ end TCL_Generic;
-
@@ -1000,10 +1004,10 @@ end TCL_Generic;
+
-
@@ -1011,10 +1015,12 @@ end TCL_Generic;
+
+
@@ -1406,13 +1412,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -2374,6 +2410,7 @@ end TCL_Generic;
+
@@ -2387,7 +2424,6 @@ end TCL_Generic;
MemWriteData
MemAddr
MemWrite
- CLK
Memory
@@ -2676,1042 +2712,1225 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
+
+
+
+
-
+
-
+
-
+
-
-
+
-
+
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
+
-
-
-
-
-
-
-
-
-
-
-
+
+
+
-
-
-
+
+
+
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
-
+
-
+
-
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
-
-
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
+
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
+
+
-
-
-
+
+
+
+
+
-
-
-
+
+
+
+
+
-
-
-
+
+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
-
+
+
-
+
-
-
+
+
-
+
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
-
+
+
-
+
+
-
+
+
-
+
-
-
+
+
-
-
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
-
-
-
-
+
-
+
-
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/README.md b/README.md
index 8fe8cb5..2be6e90 100644
--- a/README.md
+++ b/README.md
@@ -20,9 +20,9 @@ NOTE: the current implementation only recognize overflow for ADD operations and
Repository structure:
-- `slides`: here you can find the presentations used for the course, giving some hints on how to use this simulator (english slides are WIP).
+- `slides`: here you can find the presentations used for the course, giving some hints on how to use this simulator.
-- `truth-tables`: here you can find the truth tables used to generate the circuits (control unit and ALU control).
+- `truth-tables`: here you can find the truth tables used to generate the circuits.
- `hex-instructions`: here you can find some examples to load in the RAM to see how the datapath works.
diff --git a/exercises/add3/MIPS_MultiCycle.circ b/exercises/add3/MIPS_MultiCycle.circ
index dd80a77..2da63fc 100644
--- a/exercises/add3/MIPS_MultiCycle.circ
+++ b/exercises/add3/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,17 +159,23 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
+
@@ -177,19 +183,19 @@ end TCL_Generic;
-
+
-
+
+
+
+
-
-
-
@@ -198,7 +204,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -215,7 +225,7 @@ end TCL_Generic;
-
+
@@ -229,7 +239,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -260,6 +274,10 @@ end TCL_Generic;
+
+
+
+
@@ -292,7 +310,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -329,8 +351,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -339,9 +369,6 @@ end TCL_Generic;
-
-
-
@@ -388,6 +415,10 @@ end TCL_Generic;
+
+
+
+
@@ -396,17 +427,12 @@ end TCL_Generic;
-
-
-
-
-
-
+
-
+
@@ -450,6 +476,21 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -459,25 +500,19 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
+
+
+
+
@@ -506,14 +541,10 @@ end TCL_Generic;
-
+
-
-
-
-
-
-
+
+
@@ -526,7 +557,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -534,15 +569,20 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
@@ -562,8 +602,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -573,6 +621,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -604,6 +657,10 @@ end TCL_Generic;
+
+
+
+
@@ -613,10 +670,6 @@ end TCL_Generic;
-
-
-
-
@@ -625,6 +678,7 @@ end TCL_Generic;
+
@@ -636,31 +690,37 @@ end TCL_Generic;
+
+
+
+
+
+
@@ -673,16 +733,18 @@ end TCL_Generic;
+
-
+
+
+
-
-
+
@@ -701,37 +763,37 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
-
-
+
+
+
+
-
-
-
-
-
+
@@ -920,42 +982,43 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
-
-
-
-
-
-
+
+
+
-
-
+
+
-
-
+
+
@@ -980,42 +1043,39 @@ end TCL_Generic;
-
-
-
-
+
-
+
-
+
+
-
+
-
-
-
+
+
@@ -1032,7 +1092,8 @@ end TCL_Generic;
-
+
+
@@ -1047,6 +1108,41 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1061,7 +1157,7 @@ end TCL_Generic;
-
+
@@ -1126,6 +1222,76 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1147,9 +1313,26 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1166,15 +1349,11 @@ end TCL_Generic;
-
-
-
-
@@ -1191,8 +1370,12 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -1284,13 +1467,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1307,12 +1520,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1328,38 +1549,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1479,130 +1828,194 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1691,6 +2104,7 @@ end TCL_Generic;
+
@@ -1960,7 +2374,6 @@ end TCL_Generic;
-
@@ -2037,19 +2450,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -2057,34 +2493,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2096,10 +2543,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2124,16 +2575,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2321,1261 +2767,1528 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
-
+
-
+
-
-
+
-
+
-
-
+
+
+
+
+
-
+
-
-
+
-
+
-
+
-
+
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
+
-
-
-
-
-
-
-
-
-
-
-
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
+
-
-
+
+
-
+
+
-
-
+
+
-
+
+
-
+
-
+
-
-
+
+
-
+
+
-
-
+
+
-
-
+
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
-
+
+
-
+
-
+
+
-
-
+
+
-
+
+
+
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
-
-
-
-
+
+
-
-
+
+
-
+
-
-
+
+
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
+
-
-
+
-
+
+
+
+
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
-
-
+
-
-
+
+
-
-
+
-
-
-
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/add3/truth-tables/ALUControl.txt b/exercises/add3/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/add3/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/add3/truth-tables/ControlUnit.txt b/exercises/add3/truth-tables/ControlUnit.txt
deleted file mode 100644
index 547829c..0000000
--- a/exercises/add3/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,54 +0,0 @@
-# Truth table
-# Exported on Wed Apr 28 21:27:50 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA[1..0] ALUSrcB[1..0] RegWrite RegDst ReadSrc NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 0 1 0 0 0 00 00 00 01 0 0 0 0001
- 0001 000000 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 0110
- 0001 000--1 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 000010 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1001
- 0001 000100 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 001--0 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 001001 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1100
- 0001 001011 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 0011-1 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 100010 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 101--0 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0 1010
- 0010 0----- - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 ----
- 0010 10-00- - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 ----
- 0010 10-010 - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 ----
- 0010 100011 - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 0011
- 0010 10-1-- - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 ----
- 0010 101011 - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 0101
- 0010 11---- - | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0 ----
- 0011 ------ - | 0 0 1 1 0 0 0 0 0 0 00 00 00 00 0 0 0 0100
- 0100 ------ - | 0 0 0 0 0 1 0 0 0 0 00 00 00 00 1 0 0 0000
- 0101 ------ - | 0 0 1 0 1 0 0 0 0 0 00 00 00 00 0 0 0 0000
- 0110 ------ - | 0 0 0 0 0 0 0 0 0 0 00 10 01 00 0 0 0 0111
- 0111 ------ 0 | 0 0 0 0 0 0 0 0 0 0 00 00 00 00 1 1 0 0000
- 0111 ------ 1 | 0 0 0 0 0 0 0 0 0 0 00 00 00 00 1 1 0 1011
- 1000 ------ - | 1 0 0 0 0 0 0 0 0 0 01 01 01 00 0 0 0 0000
- 1001 ------ - | 0 1 0 0 0 0 0 0 0 0 10 00 00 00 0 0 0 0000
- 1010 ------ - | 0 1 0 0 0 0 0 1 0 1 11 01 00 01 0 0 0 0000
- 1011 ------ - | 0 1 0 0 0 0 0 1 1 1 11 01 00 01 0 0 0 0000
- 1100 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 01 00 0 0 1 1101
- 1101 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 10 00 0 0 0 0111
- 111- ------ - | - - - - - - - - - - -- -- -- -- - - - ----
diff --git a/exercises/add3/truth-tables/NextStateControlUnit.txt b/exercises/add3/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..5ab7431
--- /dev/null
+++ b/exercises/add3/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,54 @@
+# Truth table
+# Exported on Tue Aug 31 21:38:40 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 000--1 - | 1010
+ 0001 000010 - | 1001
+ 0001 000100 - | 1000
+ 0001 -00110 - | 1010
+ 0001 001--0 - | 1010
+ 0001 001001 - | 1100
+ 0001 001011 - | 1010
+ 0001 0011-1 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101--0 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 10-00- - | ----
+ 0010 10-010 - | ----
+ 0010 100011 - | 0011
+ 0010 10-1-- - | ----
+ 0010 101011 - | 0101
+ 0010 11---- - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ - | 0111
+ 0111 ------ 0 | 0000
+ 0111 ------ 1 | 1011
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 1010 ------ - | 0000
+ 1011 ------ - | 0000
+ 1100 ------ - | 1101
+ 1101 ------ - | 0111
+ 111- ------ - | ----
diff --git a/exercises/add3/truth-tables/OutputControlUnit.txt b/exercises/add3/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..498649d
--- /dev/null
+++ b/exercises/add3/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,55 @@
+# Truth table
+# Exported on Tue Aug 31 21:39:29 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA[1..0] ALUSrcB[1..0] RegWrite RegDst ReadSrc
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 0 0 00 00 00 01 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 00 11 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 01 10 0 0 0
+ 0011 | 0 0 1 1 0 0 0 0 0 0 00 00 00 00 0 0 0
+ 0100 | 0 0 0 0 0 1 0 0 0 0 00 00 00 00 1 0 0
+ 0101 | 0 0 1 0 1 0 0 0 0 0 00 00 00 00 0 0 0
+ 0110 | 0 0 0 0 0 0 0 0 0 0 00 10 01 00 0 0 0
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 00 00 1 1 0
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 00 00 1 1 0
+ 1000 | 1 0 0 0 0 0 0 0 0 0 01 01 01 00 0 0 0
+ 1001 | 0 1 0 0 0 0 0 0 0 0 10 00 00 00 0 0 0
+ 1010 | 0 1 0 0 0 0 0 1 0 1 11 01 00 01 0 0 0
+ 1011 | 0 1 0 0 0 0 0 1 1 1 11 01 00 01 0 0 0
+ 1100 | 0 0 0 0 0 0 0 0 0 0 00 00 01 00 0 0 1
+ 1101 | 0 0 0 0 0 0 0 0 0 0 00 00 10 00 0 0 0
+ 111- | - - - - - - - - - - -- -- -- -- - - -
diff --git a/exercises/addi/MIPS_MultiCycle.circ b/exercises/addi/MIPS_MultiCycle.circ
index bd74332..3ef6be1 100644
--- a/exercises/addi/MIPS_MultiCycle.circ
+++ b/exercises/addi/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,14 +159,17 @@ end TCL_Generic;
-
+
-
+
+
+
+
@@ -193,7 +196,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -223,7 +230,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -253,6 +264,10 @@ end TCL_Generic;
+
+
+
+
@@ -285,7 +300,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -322,8 +341,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -482,6 +509,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -493,7 +525,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -501,15 +537,20 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
@@ -529,8 +570,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -540,6 +589,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -587,6 +641,7 @@ end TCL_Generic;
+
@@ -598,31 +653,37 @@ end TCL_Generic;
+
+
+
+
+
+
@@ -635,16 +696,18 @@ end TCL_Generic;
+
+
+
-
-
+
@@ -931,6 +994,7 @@ end TCL_Generic;
+
@@ -940,23 +1004,23 @@ end TCL_Generic;
+
-
+
-
-
-
+
+
@@ -973,7 +1037,8 @@ end TCL_Generic;
-
+
+
@@ -988,6 +1053,41 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1002,7 +1102,7 @@ end TCL_Generic;
-
+
@@ -1067,6 +1167,76 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1088,9 +1258,26 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1107,15 +1294,11 @@ end TCL_Generic;
-
-
-
-
@@ -1132,8 +1315,12 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -1225,13 +1412,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1248,12 +1465,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1269,38 +1494,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1420,130 +1773,194 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1632,6 +2049,7 @@ end TCL_Generic;
+
@@ -1671,7 +2089,6 @@ end TCL_Generic;
-
@@ -1902,7 +2319,6 @@ end TCL_Generic;
-
@@ -1979,19 +2395,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -1999,34 +2438,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2038,10 +2488,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2066,16 +2520,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2256,151 +2705,342 @@ end TCL_Generic;
-
+
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IorD
+ MemRead
+ MemWrite
+ MemtoReg
+ IRWrite
+ CauseWrite
+ IntCause
+ EPCWrite
+ PCSource
+ ALUOp
+ ALUSrcA
+ ALUSrcB
+ RegWrite
+ RegDst
+ PCWriteCond
+ PCWrite
+ Op
+ Overflow
+ ControlUnit
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
+
+
+
+
-
+
-
+
-
+
-
-
+
-
+
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
+
-
-
-
-
-
-
-
+
+
+
-
-
-
+
+
+
+
+
+
+
@@ -2410,1042 +3050,1174 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
+
-
+
-
-
+
+
-
+
+
-
-
+
+
-
+
+
-
+
-
-
-
-
+
-
+
+
-
-
+
+
-
-
+
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
-
+
-
+
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
+
+
+
+
+
-
+
-
+
+
+
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
-
+
-
-
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
-
-
+
-
+
-
-
+
-
+
-
+
-
-
+
+
-
-
+
+
-
-
+
-
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/addi/truth-tables/ALUControl.txt b/exercises/addi/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/addi/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/addi/truth-tables/ControlUnit.txt b/exercises/addi/truth-tables/ControlUnit.txt
deleted file mode 100644
index 8461d69..0000000
--- a/exercises/addi/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-# Truth table
-# Exported on Thu Apr 01 15:33:16 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0 0001
- 0001 000000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0110
- 0001 00---1 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 000010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1001
- 0001 000100 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 001000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1100
- 0001 -01-10 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -01100 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0010 0----- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-00- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-010 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 100011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0011
- 0010 10-1-- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 101011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0101
- 0010 11---- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0011 ------ - | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0 0100
- 0100 ------ - | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0 0000
- 0101 ------ - | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0 0000
- 0110 ------ - | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0 0111
- 0111 ------ 0 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 0000
- 0111 ------ 1 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 1011
- 1000 ------ - | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0 0000
- 1001 ------ - | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0 0000
- 1010 ------ - | 0 1 0 0 0 0 0 1 0 1 11 01 0 01 0 0 0000
- 1011 ------ - | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0 0000
- 1100 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 1101
- 1101 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 0 0000
- 111- ------ - | - - - - - - - - - - -- -- - -- - - ----
diff --git a/exercises/addi/truth-tables/NextStateControlUnit.txt b/exercises/addi/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..fdb9715
--- /dev/null
+++ b/exercises/addi/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,53 @@
+# Truth table
+# Exported on Tue Aug 31 22:01:09 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 00---1 - | 1010
+ 0001 000010 - | 1001
+ 0001 000100 - | 1000
+ 0001 -00110 - | 1010
+ 0001 001000 - | 1100
+ 0001 -01-10 - | 1010
+ 0001 -01100 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101000 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 10-00- - | ----
+ 0010 10-010 - | ----
+ 0010 100011 - | 0011
+ 0010 10-1-- - | ----
+ 0010 101011 - | 0101
+ 0010 11---- - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ - | 0111
+ 0111 ------ 0 | 0000
+ 0111 ------ 1 | 1011
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 1010 ------ - | 0000
+ 1011 ------ - | 0000
+ 1100 ------ - | 1101
+ 1101 ------ - | 0000
+ 111- ------ - | ----
diff --git a/exercises/addi/truth-tables/OutputControlUnit.txt b/exercises/addi/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..2238c45
--- /dev/null
+++ b/exercises/addi/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,55 @@
+# Truth table
+# Exported on Tue Aug 31 22:02:17 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0011 | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0
+ 0100 | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0
+ 0101 | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0
+ 0110 | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1
+ 1000 | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0
+ 1001 | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0
+ 1010 | 0 1 0 0 0 0 0 1 0 1 11 01 0 01 0 0
+ 1011 | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0
+ 1100 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 1101 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 0
+ 111- | - - - - - - - - - - -- -- - -- - -
diff --git a/exercises/jal/MIPS_MultiCycle.circ b/exercises/jal/MIPS_MultiCycle.circ
index 8c8e784..cba4de9 100644
--- a/exercises/jal/MIPS_MultiCycle.circ
+++ b/exercises/jal/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,14 +159,17 @@ end TCL_Generic;
-
+
-
+
+
+
+
@@ -193,11 +196,15 @@ end TCL_Generic;
-
+
+
+
+
+
+
-
@@ -218,16 +225,20 @@ end TCL_Generic;
-
+
+
+
+
+
-
-
-
+
+
+
+
-
@@ -257,6 +268,10 @@ end TCL_Generic;
+
+
+
+
@@ -289,7 +304,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -327,8 +346,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -431,10 +458,6 @@ end TCL_Generic;
-
-
-
-
@@ -448,21 +471,25 @@ end TCL_Generic;
-
-
-
-
-
-
+
-
+
+
+
+
+
+
+
+
+
+
@@ -473,7 +500,7 @@ end TCL_Generic;
-
+
@@ -492,6 +519,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -503,7 +535,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -511,15 +547,20 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
@@ -539,8 +580,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -550,6 +599,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -563,7 +617,7 @@ end TCL_Generic;
-
+
@@ -598,6 +652,7 @@ end TCL_Generic;
+
@@ -609,31 +664,37 @@ end TCL_Generic;
+
+
+
+
+
+
@@ -646,16 +707,18 @@ end TCL_Generic;
+
+
+
-
-
+
@@ -676,7 +739,7 @@ end TCL_Generic;
-
+
@@ -689,34 +752,40 @@ end TCL_Generic;
-
-
+
-
+
+
+
+
+
-
+
+
-
-
+
+
+
+
-
-
+
+
-
-
+
-
-
+
+
+
@@ -903,21 +972,27 @@ end TCL_Generic;
-
+
+
+
+
+
-
-
+
+
+
+
@@ -925,20 +1000,12 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
+
@@ -954,6 +1021,7 @@ end TCL_Generic;
+
@@ -963,23 +1031,23 @@ end TCL_Generic;
+
-
+
-
-
-
+
+
@@ -996,7 +1064,8 @@ end TCL_Generic;
-
+
+
@@ -1011,6 +1080,41 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1025,7 +1129,7 @@ end TCL_Generic;
-
+
@@ -1090,6 +1194,76 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1111,9 +1285,26 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1130,15 +1321,11 @@ end TCL_Generic;
-
-
-
-
@@ -1155,8 +1342,12 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -1248,13 +1439,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1271,12 +1492,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1292,38 +1521,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1443,130 +1800,194 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1655,6 +2076,7 @@ end TCL_Generic;
+
@@ -1924,7 +2346,6 @@ end TCL_Generic;
-
@@ -2001,19 +2422,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -2021,34 +2465,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2060,10 +2515,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2088,16 +2547,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2278,1222 +2732,1543 @@ end TCL_Generic;
-
+
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IorD
+ MemRead
+ MemWrite
+ MemtoReg
+ IRWrite
+ CauseWrite
+ IntCause
+ EPCWrite
+ PCSource
+ ALUOp
+ ALUSrcA
+ ALUSrcB
+ RegWrite
+ RegDst
+ PCWriteCond
+ PCWrite
+ Op
+ Overflow
+ ControlUnit
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
+
+
+
+
-
+
-
+
-
+
-
-
+
-
+
+
-
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
-
-
-
-
-
-
-
-
-
-
+
-
-
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
-
-
-
-
-
-
-
+
-
-
+
+
-
+
+
+
-
+
+
-
+
-
-
-
-
+
-
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
+
+
-
-
+
-
+
+
+
+
+
+
+
-
+
+
+
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
-
-
+
-
-
+
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
-
+
-
-
+
-
-
+
-
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
-
-
-
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/jal/truth-tables/NextStateControlUnit.txt b/exercises/jal/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..11d97ea
--- /dev/null
+++ b/exercises/jal/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,53 @@
+# Truth table
+# Exported on Tue Aug 31 22:25:55 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 000001 - | 1010
+ 0001 000010 - | 1001
+ 0001 000011 - | 1100
+ 0001 000100 - | 1000
+ 0001 0001-1 - | 1010
+ 0001 -00110 - | 1010
+ 0001 -01--0 - | 1010
+ 0001 001--1 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 10-00- - | ----
+ 0010 10-010 - | ----
+ 0010 100011 - | 0011
+ 0010 10-1-- - | ----
+ 0010 101011 - | 0101
+ 0010 11---- - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ - | 0111
+ 0111 ------ 0 | 0000
+ 0111 ------ 1 | 1011
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 1010 ------ - | 0000
+ 1011 ------ - | 0000
+ 1100 ------ - | 1101
+ 1101 ------ - | 0000
+ 111- ------ - | ----
diff --git a/exercises/jal/truth-tables/OutputControlUnit.txt b/exercises/jal/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..a70913c
--- /dev/null
+++ b/exercises/jal/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,52 @@
+# Truth table
+# Exported on Tue Aug 31 22:26:54 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[2..0] RegWrite RegDst[1..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 0 0 00 00 0 001 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 011 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 010 0 00
+ 0011 | 0 0 1 1 0 0 0 0 0 0 00 00 0 000 0 00
+ 0100 | 0 0 0 0 0 1 0 0 0 0 00 00 0 000 1 00
+ 0101 | 0 0 1 0 1 0 0 0 0 0 00 00 0 000 0 00
+ 0110 | 0 0 0 0 0 0 0 0 0 0 00 10 1 000 0 00
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 000 1 01
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 000 1 01
+ 1000 | 1 0 0 0 0 0 0 0 0 0 01 01 1 000 0 00
+ 1001 | 0 1 0 0 0 0 0 0 0 0 10 00 0 000 0 00
+ 1010 | 0 1 0 0 0 0 0 1 0 1 11 01 0 001 0 00
+ 1011 | 0 1 0 0 0 0 0 1 1 1 11 01 0 001 0 00
+ 1100 | 0 0 0 0 0 0 0 0 0 0 00 00 0 100 0 00
+ 1101 | 0 1 0 0 0 0 0 0 0 0 10 00 0 000 1 10
+ 111- | - - - - - - - - - - -- -- - --- - --
diff --git a/exercises/jrim/MIPS_MultiCycle.circ b/exercises/jrim/MIPS_MultiCycle.circ
index b2eb201..e42f582 100644
--- a/exercises/jrim/MIPS_MultiCycle.circ
+++ b/exercises/jrim/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,14 +159,17 @@ end TCL_Generic;
-
+
-
+
+
+
+
@@ -193,7 +196,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -223,7 +230,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -253,6 +264,10 @@ end TCL_Generic;
+
+
+
+
@@ -285,7 +300,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -322,8 +341,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -482,6 +509,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -493,7 +525,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -501,15 +537,20 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
@@ -529,8 +570,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -540,6 +589,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -587,6 +641,7 @@ end TCL_Generic;
+
@@ -598,31 +653,37 @@ end TCL_Generic;
+
+
+
+
+
+
@@ -635,16 +696,18 @@ end TCL_Generic;
+
+
+
-
-
+
@@ -931,6 +994,7 @@ end TCL_Generic;
+
@@ -940,23 +1004,23 @@ end TCL_Generic;
+
-
+
-
-
-
+
+
@@ -973,7 +1037,8 @@ end TCL_Generic;
-
+
+
@@ -988,6 +1053,41 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1002,7 +1102,7 @@ end TCL_Generic;
-
+
@@ -1067,6 +1167,76 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1088,9 +1258,26 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1107,15 +1294,11 @@ end TCL_Generic;
-
-
-
-
@@ -1132,8 +1315,12 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -1225,13 +1412,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1248,12 +1465,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1269,38 +1494,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1420,130 +1773,194 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1632,6 +2049,7 @@ end TCL_Generic;
+
@@ -1901,7 +2319,6 @@ end TCL_Generic;
-
@@ -1978,19 +2395,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -1998,34 +2438,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2037,10 +2488,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2065,16 +2520,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2262,144 +2712,272 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
+
+
+
+
-
+
-
+
-
+
-
-
+
-
+
+
-
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
-
-
-
-
-
-
+
+
+
-
-
-
+
+
+
+
+
+
+
@@ -2409,1045 +2987,1172 @@ end TCL_Generic;
-
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
+
-
+
+
-
+
-
-
-
-
-
-
-
-
-
-
-
+
+
-
+
+
-
-
+
+
-
-
+
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
+
-
+
-
+
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
-
+
-
-
+
-
-
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
-
-
+
+
-
+
-
-
+
+
+
+
+
+
+
+
+
-
+
-
-
+
+
+
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
+
-
-
+
-
+
-
+
-
+
-
-
+
+
-
-
+
-
-
+
-
-
+
-
-
+
-
-
-
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/jrim/truth-tables/ALUControl.txt b/exercises/jrim/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/jrim/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/jrim/truth-tables/ControlUnit.txt b/exercises/jrim/truth-tables/ControlUnit.txt
deleted file mode 100644
index 24aded2..0000000
--- a/exercises/jrim/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-# Truth table
-# Exported on Sun Apr 04 10:09:40 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0 0001
- 0001 000000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0110
- 0001 000--1 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 000010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1001
- 0001 000100 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -01--0 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 001001 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1100
- 0001 001011 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 0011-1 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0010 0----- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-00- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-010 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 100011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0011
- 0010 10-1-- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 101011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0101
- 0010 11---- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0011 ------ - | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0 0100
- 0100 ------ - | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0 0000
- 0101 ------ - | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0 0000
- 0110 ------ - | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0 0111
- 0111 ------ 0 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 0000
- 0111 ------ 1 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 1011
- 1000 ------ - | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0 0000
- 1001 ------ - | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0 0000
- 1010 ------ - | 0 1 0 0 0 0 0 1 0 1 11 01 0 01 0 0 0000
- 1011 ------ - | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0 0000
- 1100 ------ - | 0 1 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0000
- 1101 ------ - | - - - - - - - - - - -- -- - -- - - ----
- 111- ------ - | - - - - - - - - - - -- -- - -- - - ----
diff --git a/exercises/jrim/truth-tables/NextStateControlUnit.txt b/exercises/jrim/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..88e71b5
--- /dev/null
+++ b/exercises/jrim/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,53 @@
+# Truth table
+# Exported on Sat Sep 25 17:24:29 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 000--1 - | 1010
+ 0001 000010 - | 1001
+ 0001 000100 - | 1000
+ 0001 -00110 - | 1010
+ 0001 -01--0 - | 1010
+ 0001 001001 - | 1100
+ 0001 001011 - | 1010
+ 0001 0011-1 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 10-00- - | ----
+ 0010 10-010 - | ----
+ 0010 100011 - | 0011
+ 0010 10-1-- - | ----
+ 0010 101011 - | 0101
+ 0010 11---- - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ - | 0111
+ 0111 ------ 0 | 0000
+ 0111 ------ 1 | 1011
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 1010 ------ - | 0000
+ 1011 ------ - | 0000
+ 1100 ------ - | 0000
+ 1101 ------ - | ----
+ 111- ------ - | ----
diff --git a/exercises/jrim/truth-tables/OutputControlUnit.txt b/exercises/jrim/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..ae8dd32
--- /dev/null
+++ b/exercises/jrim/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,54 @@
+# Truth table
+# Exported on Sat Sep 25 17:25:51 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0011 | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0
+ 0100 | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0
+ 0101 | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0
+ 0110 | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1
+ 1000 | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0
+ 1001 | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0
+ 1010 | 0 1 0 0 0 0 0 1 0 1 11 01 0 01 0 0
+ 1011 | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0
+ 1100 | 0 1 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 1101 | - - - - - - - - - - -- -- - -- - -
+ 111- | - - - - - - - - - - -- -- - -- - -
diff --git a/exercises/lw_not_aligned_ex/MIPS_MultiCycle.circ b/exercises/lw_not_aligned_ex/MIPS_MultiCycle.circ
index 959ef53..25c6a31 100644
--- a/exercises/lw_not_aligned_ex/MIPS_MultiCycle.circ
+++ b/exercises/lw_not_aligned_ex/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,17 +159,23 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
+
@@ -178,9 +184,6 @@ end TCL_Generic;
-
-
-
@@ -197,7 +200,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -227,7 +234,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -257,6 +268,10 @@ end TCL_Generic;
+
+
+
+
@@ -275,25 +290,53 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
@@ -304,19 +347,10 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
@@ -328,16 +362,14 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
+
+
+
+
@@ -346,43 +378,17 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
@@ -398,13 +404,18 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
@@ -413,11 +424,38 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -532,6 +570,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -543,7 +586,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -551,18 +598,23 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
-
+
-
+
+
@@ -583,8 +635,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -594,9 +654,12 @@ end TCL_Generic;
-
-
+
+
+
+
+
@@ -616,7 +679,7 @@ end TCL_Generic;
-
+
@@ -666,15 +729,15 @@ end TCL_Generic;
-
+
-
+
-
+
@@ -706,16 +769,18 @@ end TCL_Generic;
+
+
+
-
-
+
@@ -734,7 +799,7 @@ end TCL_Generic;
-
+
@@ -849,7 +914,7 @@ end TCL_Generic;
-
+
@@ -864,38 +929,31 @@ end TCL_Generic;
-
-
-
+
+
+
-
-
+
-
-
-
+
+
-
-
-
-
-
-
-
+
+
@@ -903,26 +961,13 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
@@ -949,13 +994,22 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
@@ -967,6 +1021,8 @@ end TCL_Generic;
+
+
@@ -1024,6 +1080,7 @@ end TCL_Generic;
+
@@ -1033,26 +1090,24 @@ end TCL_Generic;
+
-
+
+
-
-
-
-
+
-
-
+
@@ -1069,7 +1124,8 @@ end TCL_Generic;
-
+
+
@@ -1443,13 +1499,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1466,12 +1552,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1487,38 +1581,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1914,6 +2136,7 @@ end TCL_Generic;
+
@@ -2183,7 +2406,6 @@ end TCL_Generic;
-
@@ -2260,19 +2482,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -2280,34 +2525,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2319,10 +2575,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2347,16 +2607,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2544,1157 +2799,1353 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
-
+
-
+
+
-
+
-
+
-
-
+
-
+
-
-
+
-
+
-
+
+
+
+
+
-
+
-
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
-
-
-
-
+
-
-
-
-
+
+
+
+
-
-
-
-
+
+
+
+
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
-
+
+
+
+
-
+
-
-
+
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
+
+
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
-
+
-
+
-
+
-
-
+
+
-
+
-
+
-
-
+
+
-
+
+
-
+
-
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
-
+
+
-
+
-
+
-
-
+
-
-
+
-
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
-
-
-
-
-
+
-
-
+
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/lw_not_aligned_ex/truth-tables/ALUControl.txt b/exercises/lw_not_aligned_ex/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/lw_not_aligned_ex/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/lw_not_aligned_ex/truth-tables/NextStateControlUnit.txt b/exercises/lw_not_aligned_ex/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..cf23a1e
--- /dev/null
+++ b/exercises/lw_not_aligned_ex/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,48 @@
+# Truth table
+# Exported on Sat Sep 25 20:02:21 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow Aligned | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - - | 0001
+ 0001 000000 - - | 0110
+ 0001 00---1 - - | 1010
+ 0001 000010 - - | 1001
+ 0001 000100 - - | 1000
+ 0001 -00110 - - | 1010
+ 0001 -01--0 - - | 1010
+ 0001 -1---- - - | 1010
+ 0001 100-0- - - | 1010
+ 0001 100010 - - | 1010
+ 0001 10-011 - - | 0010
+ 0001 10-111 - - | 1010
+ 0001 101-01 - - | 1010
+ 0010 0----- - - | ----
+ 0010 1---0- - - | ----
+ 0010 1---10 - - | ----
+ 0010 100011 - 0 | 1011
+ 0010 100011 - 1 | 0011
+ 0010 1--111 - - | ----
+ 0010 101011 - - | 0101
+ 0010 11-011 - - | ----
+ 0011 ------ - - | 0100
+ 0100 ------ - - | 0000
+ 0101 ------ - - | 0000
+ 0110 ------ - - | 0111
+ 0111 ------ - - | 0000
+ 1000 ------ - - | 0000
+ 1001 ------ - - | 0000
+ 1010 ------ - - | 0000
+ 1011 ------ - - | 0000
+ 11-- ------ - - | ----
diff --git a/exercises/lw_not_aligned_ex/truth-tables/OutputControlUnit.txt b/exercises/lw_not_aligned_ex/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..73a9b22
--- /dev/null
+++ b/exercises/lw_not_aligned_ex/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,47 @@
+# Truth table
+# Exported on Sat Sep 25 20:03:10 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause[1..0] EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst BadAddrWrite
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 00 0 00 00 0 01 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0001 | 0 0 0 0 0 0 0 0 00 0 00 00 0 11 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0010 | 0 0 0 0 0 0 0 0 00 0 00 00 1 10 0 0 0
+ 0011 | 0 0 1 1 0 0 0 0 00 0 00 00 0 00 0 0 0
+ 0100 | 0 0 0 0 0 1 0 0 00 0 00 00 0 00 1 0 0
+ 0101 | 0 0 1 0 1 0 0 0 00 0 00 00 0 00 0 0 0
+ 0110 | 0 0 0 0 0 0 0 0 00 0 00 10 1 00 0 0 0
+ 0111 | 0 0 0 0 0 0 0 0 00 0 00 00 0 00 1 1 0
+ 1000 | 1 0 0 0 0 0 0 0 00 0 01 01 1 00 0 0 0
+ 1001 | 0 1 0 0 0 0 0 0 00 0 10 00 0 00 0 0 0
+ 1010 | 0 0 0 0 0 0 0 0 00 0 00 00 0 00 0 0 0
+ 1011 | 0 1 0 0 0 0 0 1 10 1 11 01 0 01 0 0 1
+ 11-- | - - - - - - - - -- - -- -- - -- - - -
diff --git a/exercises/lw_not_aligned_ex/truth-tables/OverflowDetect.txt b/exercises/lw_not_aligned_ex/truth-tables/OverflowDetect.txt
deleted file mode 100644
index aee0d79..0000000
--- a/exercises/lw_not_aligned_ex/truth-tables/OverflowDetect.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-# Truth table
-# Generated from circuit OverflowDetect
-# Exported on Sat May 15 23:18:39 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-SignA SignB SignOut | Overflow
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0 0 0 | 0
- 0 0 1 | 1
- 0 1 0 | 0
- 0 1 1 | 0
- 1 0 0 | 0
- 1 0 1 | 0
- 1 1 0 | 1
- 1 1 1 | 0
diff --git a/exercises/overflow_ex_v2/MIPS_MultiCycle.circ b/exercises/overflow/MIPS_MultiCycle.circ
similarity index 65%
rename from exercises/overflow_ex_v2/MIPS_MultiCycle.circ
rename to exercises/overflow/MIPS_MultiCycle.circ
index 205e3da..5dfa0ea 100644
--- a/exercises/overflow_ex_v2/MIPS_MultiCycle.circ
+++ b/exercises/overflow/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,14 +159,17 @@ end TCL_Generic;
-
+
-
+
+
+
+
@@ -193,7 +196,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -223,7 +230,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -253,6 +264,10 @@ end TCL_Generic;
+
+
+
+
@@ -285,7 +300,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -322,8 +341,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -482,6 +509,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -493,7 +525,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -501,15 +537,20 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
@@ -529,8 +570,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -540,6 +589,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -642,16 +696,18 @@ end TCL_Generic;
+
+
+
-
-
+
@@ -938,6 +994,7 @@ end TCL_Generic;
+
@@ -947,23 +1004,23 @@ end TCL_Generic;
+
-
+
-
-
-
+
+
@@ -980,7 +1037,8 @@ end TCL_Generic;
-
+
+
@@ -1354,13 +1412,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1377,12 +1465,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1398,38 +1494,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1825,6 +2049,7 @@ end TCL_Generic;
+
@@ -2094,7 +2319,6 @@ end TCL_Generic;
-
@@ -2171,19 +2395,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -2191,34 +2438,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2230,10 +2488,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2258,16 +2520,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2455,144 +2712,272 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
+
+
+
+
-
+
-
+
-
+
-
-
+
-
+
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
+
-
-
-
-
-
-
-
+
+
+
-
-
-
+
+
+
+
+
+
+
@@ -2603,993 +2988,1047 @@ end TCL_Generic;
-
-
-
+
+
-
-
-
-
-
+
-
-
-
-
-
-
-
-
-
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
-
-
-
-
+
-
+
-
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
+
-
+
+
+
+
+
-
+
-
-
+
+
-
+
-
+
-
+
+
+
+
+
-
+
-
+
-
+
-
+
-
+
-
-
-
-
+
+
-
+
+
-
+
+
-
+
+
-
+
+
-
+
-
+
-
+
-
+
-
-
+
-
-
+
-
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
-
-
+
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/overflow_ex_v2/README.md b/exercises/overflow/README.md
similarity index 100%
rename from exercises/overflow_ex_v2/README.md
rename to exercises/overflow/README.md
diff --git a/exercises/overflow_ex_v1/add_overflow.hex b/exercises/overflow/add_overflow.hex
similarity index 100%
rename from exercises/overflow_ex_v1/add_overflow.hex
rename to exercises/overflow/add_overflow.hex
diff --git a/exercises/overflow/truth-tables/NextStateControlUnit.txt b/exercises/overflow/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..8f4101e
--- /dev/null
+++ b/exercises/overflow/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,48 @@
+# Truth table
+# Exported on Sat Sep 25 18:40:59 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 00---1 - | 1010
+ 0001 000010 - | 1001
+ 0001 000100 - | 1000
+ 0001 -00110 - | 1010
+ 0001 -01--0 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 1---0- - | ----
+ 0010 1---10 - | ----
+ 0010 100011 - | 0011
+ 0010 1--111 - | ----
+ 0010 101011 - | 0101
+ 0010 11-011 - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ 0 | 0111
+ 0110 ------ 1 | 1011
+ 0111 ------ - | 0000
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 1010 ------ - | 0000
+ 1011 ------ - | 0000
+ 11-- ------ - | ----
diff --git a/exercises/overflow/truth-tables/OutputControlUnit.txt b/exercises/overflow/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..68a9d02
--- /dev/null
+++ b/exercises/overflow/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,47 @@
+# Truth table
+# Exported on Sat Sep 25 18:41:22 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0011 | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0
+ 0100 | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0
+ 0101 | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0
+ 0110 | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1
+ 1000 | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0
+ 1001 | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0
+ 1010 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 0 0
+ 1011 | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0
+ 11-- | - - - - - - - - - - -- -- - -- - -
diff --git a/exercises/overflow_ex_v1/MIPS_MultiCycle.circ b/exercises/overflow_ex_v1/MIPS_MultiCycle.circ
deleted file mode 100644
index 65c8e8b..0000000
--- a/exercises/overflow_ex_v1/MIPS_MultiCycle.circ
+++ /dev/null
@@ -1,3618 +0,0 @@
-
-
- This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- addr/data: 8 8
-0
-
-
-
-
-
-
-
- library ieee;
-use ieee.std_logic_1164.all;
-
-entity TCL_Generic is
- port(
- --Insert input ports below
- horloge_i : in std_logic; -- input bit example
- val_i : in std_logic_vector(3 downto 0); -- input vector example
-
- --Insert output ports below
- max_o : out std_logic; -- output bit example
- cpt_o : out std_logic_Vector(3 downto 0) -- output vector example
- );
-end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/exercises/overflow_ex_v1/README.md b/exercises/overflow_ex_v1/README.md
deleted file mode 100644
index dab9979..0000000
--- a/exercises/overflow_ex_v1/README.md
+++ /dev/null
@@ -1,6 +0,0 @@
-# overflow exception v1
-
-This solution implements the overflow exception as written in the book.
-
-## add_overflow.hex
-Load 7fffffff and 000000004 to 2 registers and add them.
diff --git a/exercises/overflow_ex_v1/truth-tables/ALUControl.txt b/exercises/overflow_ex_v1/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/overflow_ex_v1/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/overflow_ex_v1/truth-tables/ControlUnit.txt b/exercises/overflow_ex_v1/truth-tables/ControlUnit.txt
deleted file mode 100644
index b7e96fe..0000000
--- a/exercises/overflow_ex_v1/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-# Truth table
-# Exported on Fri Mar 12 20:40:29 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0 0001
- 0001 000000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0110
- 0001 00---1 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 000010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1001
- 0001 000100 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -01--0 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0010 0----- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-00- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-010 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 100011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0011
- 0010 10-1-- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 101011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0101
- 0010 11---- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0011 ------ - | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0 0100
- 0100 ------ - | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0 0000
- 0101 ------ - | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0 0000
- 0110 ------ - | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0 0111
- 0111 ------ 0 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 0000
- 0111 ------ 1 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 1011
- 1000 ------ - | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0 0000
- 1001 ------ - | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0 0000
- 1010 ------ - | 0 1 0 0 0 0 0 1 0 1 11 01 0 01 0 0 0000
- 1011 ------ - | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0 0000
- 11-- ------ - | - - - - - - - - - - -- -- - -- - - ----
diff --git a/exercises/overflow_ex_v2/add_overflow.hex b/exercises/overflow_ex_v2/add_overflow.hex
deleted file mode 100644
index 7c61d85..0000000
--- a/exercises/overflow_ex_v2/add_overflow.hex
+++ /dev/null
@@ -1,2 +0,0 @@
-v3.0 hex words plain
-8c08000c 8C090010 01095020 7fffffff 00000004 00000000 00000000 00000000
diff --git a/exercises/overflow_ex_v2/truth-tables/ALUControl.txt b/exercises/overflow_ex_v2/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/overflow_ex_v2/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/overflow_ex_v2/truth-tables/ControlUnit.txt b/exercises/overflow_ex_v2/truth-tables/ControlUnit.txt
deleted file mode 100644
index 1ddb514..0000000
--- a/exercises/overflow_ex_v2/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-# Truth table
-# Exported on Sat May 15 22:47:31 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0 0001
- 0001 000000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0110
- 0001 00---1 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 000010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1001
- 0001 000100 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -01--0 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0010 0----- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 1---0- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 1---10 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 100011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0011
- 0010 1--111 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 101011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0101
- 0010 11-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0011 ------ - | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0 0100
- 0100 ------ - | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0 0000
- 0101 ------ - | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0 0000
- 0110 ------ 0 | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0 0111
- 0110 ------ 1 | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0 1011
- 0111 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 0000
- 1000 ------ - | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0 0000
- 1001 ------ - | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0 0000
- 1010 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 0 0 0000
- 1011 ------ - | 0 1 0 0 0 0 0 1 1 1 11 01 0 01 0 0 0000
- 11-- ------ - | - - - - - - - - - - -- -- - -- - - ----
diff --git a/exercises/overflow_ex_v2/truth-tables/OverflowDetect.txt b/exercises/overflow_ex_v2/truth-tables/OverflowDetect.txt
deleted file mode 100644
index aee0d79..0000000
--- a/exercises/overflow_ex_v2/truth-tables/OverflowDetect.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-# Truth table
-# Generated from circuit OverflowDetect
-# Exported on Sat May 15 23:18:39 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-SignA SignB SignOut | Overflow
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0 0 0 | 0
- 0 0 1 | 1
- 0 1 0 | 0
- 0 1 1 | 0
- 1 0 0 | 0
- 1 0 1 | 0
- 1 1 0 | 1
- 1 1 1 | 0
diff --git a/exercises/swap/MIPS_MultiCycle.circ b/exercises/swap/MIPS_MultiCycle.circ
index 3290246..f7e7f30 100644
--- a/exercises/swap/MIPS_MultiCycle.circ
+++ b/exercises/swap/MIPS_MultiCycle.circ
@@ -1,5 +1,5 @@
-
+
This file is intended to be loaded by Logisim-evolution (https://github.com/reds-heig/logisim-evolution).
@@ -114,7 +114,7 @@ end TCL_Generic;
-
+
@@ -159,25 +159,20 @@ end TCL_Generic;
-
+
-
+
-
-
-
+
+
-
-
-
-
@@ -201,7 +196,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -231,7 +230,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -261,6 +264,10 @@ end TCL_Generic;
+
+
+
+
@@ -294,7 +301,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -331,8 +342,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -395,22 +414,12 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
+
@@ -458,16 +467,16 @@ end TCL_Generic;
-
-
-
-
-
+
+
+
+
+
@@ -478,6 +487,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -487,11 +501,6 @@ end TCL_Generic;
-
-
-
-
-
@@ -502,6 +511,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -513,7 +527,11 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -521,15 +539,20 @@ end TCL_Generic;
-
+
-
+
+
+
+
+
+
@@ -549,8 +572,16 @@ end TCL_Generic;
-
-
+
+
+
+
+
+
+
+
+
+
@@ -560,6 +591,11 @@ end TCL_Generic;
+
+
+
+
+
@@ -590,15 +626,16 @@ end TCL_Generic;
-
+
+
-
+
-
+
-
-
+
+
@@ -608,6 +645,7 @@ end TCL_Generic;
+
@@ -619,31 +657,37 @@ end TCL_Generic;
+
+
+
+
+
+
@@ -656,24 +700,24 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
+
+
+
+
+
+
-
-
-
+
+
@@ -694,6 +738,9 @@ end TCL_Generic;
+
+
+
@@ -903,61 +950,58 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
+
+
+
-
-
-
+
+
+
+
+
+
+
-
-
-
-
+
+
-
-
@@ -970,6 +1014,7 @@ end TCL_Generic;
+
@@ -979,23 +1024,25 @@ end TCL_Generic;
+
-
+
+
+
-
-
-
+
+
@@ -1012,7 +1059,8 @@ end TCL_Generic;
-
+
+
@@ -1027,6 +1075,41 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1041,7 +1124,7 @@ end TCL_Generic;
-
+
@@ -1106,6 +1189,76 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1127,9 +1280,26 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1146,15 +1316,11 @@ end TCL_Generic;
-
-
-
-
@@ -1171,8 +1337,12 @@ end TCL_Generic;
-
+
+
+
+
+
@@ -1264,13 +1434,43 @@ end TCL_Generic;
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ReadData1
+ ReadData2
+ WriteData
+ ReadRegis..
+ ReadRegis..
+ WriteEnable
+ WriteRegi..
+ RegisterFile
+
@@ -1287,12 +1487,20 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
@@ -1308,38 +1516,166 @@ end TCL_Generic;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1459,130 +1795,194 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1671,6 +2071,7 @@ end TCL_Generic;
+
@@ -1940,7 +2341,6 @@ end TCL_Generic;
-
@@ -2017,19 +2417,42 @@ end TCL_Generic;
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MemData
+ MemRead
+ MemWriteData
+ MemAddr
+ MemWrite
+ Memory
+
+
-
+
@@ -2037,34 +2460,45 @@ end TCL_Generic;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
+
-
-
+
@@ -2076,10 +2510,14 @@ end TCL_Generic;
-
-
-
+
+
+
+
+
+
+
@@ -2104,16 +2542,11 @@ end TCL_Generic;
+
-
-
-
-
-
-
-
+
-
+
@@ -2301,1280 +2734,1537 @@ end TCL_Generic;
-
-
-
-
-
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
-
+
+
+
+
+
+
+
-
+
-
+
-
+
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
+
+
+
-
+
-
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
-
+
-
+
-
+
-
-
+
+
-
+
+
-
+
-
+
+
-
+
-
-
-
-
+
+
-
-
+
+
-
-
+
+
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
-
+
-
+
-
+
+
-
+
-
-
+
+
-
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
-
+
-
+
-
+
+
+
+
-
-
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
-
+
-
-
+
+
-
-
+
+
-
+
-
-
+
+
-
+
-
-
+
-
-
+
+
-
+
-
+
+
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
+
-
+
+
-
+
+
-
+
-
+
+
-
+
-
+
-
+
-
-
+
-
+
-
-
+
-
+
+
-
-
+
-
-
+
+
-
-
+
-
-
+
-
-
-
+
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/exercises/swap/truth-tables/ALUControl.txt b/exercises/swap/truth-tables/ALUControl.txt
deleted file mode 100644
index 4baab3d..0000000
--- a/exercises/swap/truth-tables/ALUControl.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-# Truth table
-# Exported on Sat Mar 13 12:00:32 CET 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-ALUOp[1..0] Funct[5..0] | ALUFunct[1..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 00 000000 | 00
- 00 -----1 | 00
- 00 ----10 | 00
- 00 ---100 | 00
- 00 --1000 | 00
- 00 -10000 | 00
- 00 100000 | 00
- 01 ------ | 01
- 10 0----- | --
- 10 100000 | 00
- 10 100001 | --
- 10 100010 | 01
- 10 100011 | --
- 10 100100 | 10
- 10 100101 | --
- 10 10011- | --
- 10 10100- | --
- 10 101010 | 11
- 10 101011 | --
- 10 1011-- | --
- 10 11---- | --
- 11 ------ | --
diff --git a/exercises/swap/truth-tables/ControlUnit.txt b/exercises/swap/truth-tables/ControlUnit.txt
deleted file mode 100644
index 778b562..0000000
--- a/exercises/swap/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-# Truth table
-# Exported on Sun Apr 04 11:14:02 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg[1..0] IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 00 1 0 0 0 00 00 0 01 0 0 0001
- 0001 000000 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 0110
- 0001 000--1 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 000010 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1001
- 0001 000100 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -01--0 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 001001 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1100
- 0001 001011 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 0011-1 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100010 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0 1010
- 0010 0----- - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-00- - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 ----
- 0010 10-010 - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 ----
- 0010 100011 - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 0011
- 0010 10-1-- - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 ----
- 0010 101011 - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 0101
- 0010 11---- - | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0 ----
- 0011 ------ - | 0 0 1 1 0 00 0 0 0 0 00 00 0 00 0 0 0100
- 0100 ------ - | 0 0 0 0 0 01 0 0 0 0 00 00 0 00 1 0 0000
- 0101 ------ - | 0 0 1 0 1 00 0 0 0 0 00 00 0 00 0 0 0000
- 0110 ------ - | 0 0 0 0 0 00 0 0 0 0 00 10 1 00 0 0 0111
- 0111 ------ 0 | 0 0 0 0 0 00 0 0 0 0 00 00 0 00 1 1 0000
- 0111 ------ 1 | 0 0 0 0 0 00 0 0 0 0 00 00 0 00 1 1 1011
- 1000 ------ - | 1 0 0 0 0 00 0 0 0 0 01 01 1 00 0 0 0000
- 1001 ------ - | 0 1 0 0 0 00 0 0 0 0 10 00 0 00 0 0 0000
- 1010 ------ - | 0 1 0 0 0 00 0 1 0 1 11 01 0 01 0 0 0000
- 1011 ------ - | 0 1 0 0 0 00 0 1 1 1 11 01 0 01 0 0 0000
- 1100 ------ - | 0 0 0 0 0 10 0 0 0 0 00 00 0 00 1 0 1101
- 1101 ------ - | 0 0 0 0 0 11 0 0 0 0 00 00 0 00 1 1 0000
- 111- ------ - | - - - - - -- - - - - -- -- - -- - - ----
diff --git a/exercises/swap/truth-tables/NextStateControlUnit.txt b/exercises/swap/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..a8dc6a7
--- /dev/null
+++ b/exercises/swap/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,53 @@
+# Truth table
+# Exported on Sat Sep 25 17:34:43 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 000--1 - | 1010
+ 0001 000010 - | 1001
+ 0001 000100 - | 1000
+ 0001 -00110 - | 1010
+ 0001 -01--0 - | 1010
+ 0001 001001 - | 1100
+ 0001 001011 - | 1010
+ 0001 0011-1 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 10-00- - | ----
+ 0010 10-010 - | ----
+ 0010 100011 - | 0011
+ 0010 10-1-- - | ----
+ 0010 101011 - | 0101
+ 0010 11---- - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ - | 0111
+ 0111 ------ 0 | 0000
+ 0111 ------ 1 | 1011
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 1010 ------ - | 0000
+ 1011 ------ - | 0000
+ 1100 ------ - | 1101
+ 1101 ------ - | 0000
+ 111- ------ - | ----
diff --git a/exercises/swap/truth-tables/OutputControlUnit.txt b/exercises/swap/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..7e39c97
--- /dev/null
+++ b/exercises/swap/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,54 @@
+# Truth table
+# Exported on Sat Sep 25 17:34:04 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg[1..0] IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 00 1 0 0 0 00 00 0 01 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 00 0 0 0 0 00 00 0 11 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 00 0 0 0 0 00 00 1 10 0 0
+ 0011 | 0 0 1 1 0 00 0 0 0 0 00 00 0 00 0 0
+ 0100 | 0 0 0 0 0 01 0 0 0 0 00 00 0 00 1 0
+ 0101 | 0 0 1 0 1 00 0 0 0 0 00 00 0 00 0 0
+ 0110 | 0 0 0 0 0 00 0 0 0 0 00 10 1 00 0 0
+ 0111 | 0 0 0 0 0 00 0 0 0 0 00 00 0 00 1 1
+ 0111 | 0 0 0 0 0 00 0 0 0 0 00 00 0 00 1 1
+ 1000 | 1 0 0 0 0 00 0 0 0 0 01 01 1 00 0 0
+ 1001 | 0 1 0 0 0 00 0 0 0 0 10 00 0 00 0 0
+ 1010 | 0 1 0 0 0 00 0 1 0 1 11 01 0 01 0 0
+ 1011 | 0 1 0 0 0 00 0 1 1 1 11 01 0 01 0 0
+ 1100 | 0 0 0 0 0 10 0 0 0 0 00 00 0 00 1 0
+ 1101 | 0 0 0 0 0 11 0 0 0 0 00 00 0 00 1 1
+ 111- | - - - - - -- - - - - -- -- - -- - -
diff --git a/slides/IT.pdf b/slides/IT.pdf
deleted file mode 100644
index 03a6079..0000000
Binary files a/slides/IT.pdf and /dev/null differ
diff --git a/slides/EN.pdf b/slides/MIPS-multicycle-datapath.pdf
similarity index 77%
rename from slides/EN.pdf
rename to slides/MIPS-multicycle-datapath.pdf
index 6b75928..e5b5842 100644
Binary files a/slides/EN.pdf and b/slides/MIPS-multicycle-datapath.pdf differ
diff --git a/truth-tables/ControlUnit.txt b/truth-tables/ControlUnit.txt
deleted file mode 100644
index 0c8f1c3..0000000
--- a/truth-tables/ControlUnit.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-# Truth table
-# Exported on Mon May 10 14:04:28 CEST 2021
-
-# Hints and Notes on Formatting:
-# * You can edit this file then import it back into Logisim!
-# * Anything after a '#' is a comment and will be ignored.
-# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
-# * Keep column names simple (no spaces, punctuation, etc.)
-# * 'Name[N..0]' indicates an N+1 bit variable, whereas
-# 'Name' by itself indicates a 1-bit variable.
-# * You can use 'x' or '-' to indicate "don't care" for both
-# input and output bits.
-# * You can use binary (e.g., '10100011xxxx') notation or
-# or hex (e.g., 'C3x'). Logisim will figure out which is which.
-
-CurrentState[3..0] Op[5..0] Overflow | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst NextState[3..0]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- 0000 ------ - | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0 0001
- 0001 000000 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0110
- 0001 00---1 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 000010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1001
- 0001 000100 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1000
- 0001 -00110 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -01--0 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 -1---- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100-0- - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 100010 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 10-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 0010
- 0001 10-111 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0001 101-01 - | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0 1010
- 0010 0----- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 1---0- - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 1---10 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 100011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0011
- 0010 1--111 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0010 101011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 0101
- 0010 11-011 - | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0 ----
- 0011 ------ - | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0 0100
- 0100 ------ - | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0 0000
- 0101 ------ - | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0 0000
- 0110 ------ - | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0 0111
- 0111 ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1 0000
- 1000 ------ - | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0 0000
- 1001 ------ - | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0 0000
- 101- ------ - | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 0 0 0000
- 11-- ------ - | - - - - - - - - - - -- -- - -- - - ----
diff --git a/truth-tables/NextStateControlUnit.txt b/truth-tables/NextStateControlUnit.txt
new file mode 100644
index 0000000..813f967
--- /dev/null
+++ b/truth-tables/NextStateControlUnit.txt
@@ -0,0 +1,46 @@
+# Truth table
+# Exported on Sat Aug 28 13:07:08 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] Op[5..0] Overflow | NextState[3..0]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 ------ - | 0001
+ 0001 000000 - | 0110
+ 0001 00---1 - | 1010
+ 0001 000010 - | 1001
+ 0001 000100 - | 1000
+ 0001 -00110 - | 1010
+ 0001 -01--0 - | 1010
+ 0001 -1---- - | 1010
+ 0001 100-0- - | 1010
+ 0001 100010 - | 1010
+ 0001 10-011 - | 0010
+ 0001 10-111 - | 1010
+ 0001 101-01 - | 1010
+ 0010 0----- - | ----
+ 0010 1---0- - | ----
+ 0010 1---10 - | ----
+ 0010 100011 - | 0011
+ 0010 1--111 - | ----
+ 0010 101011 - | 0101
+ 0010 11-011 - | ----
+ 0011 ------ - | 0100
+ 0100 ------ - | 0000
+ 0101 ------ - | 0000
+ 0110 ------ - | 0111
+ 0111 ------ - | 0000
+ 1000 ------ - | 0000
+ 1001 ------ - | 0000
+ 101- ------ - | 0000
+ 11-- ------ - | ----
diff --git a/truth-tables/OutputControlUnit.txt b/truth-tables/OutputControlUnit.txt
new file mode 100644
index 0000000..d87aeff
--- /dev/null
+++ b/truth-tables/OutputControlUnit.txt
@@ -0,0 +1,48 @@
+# Truth table
+# Exported on Sat Aug 28 13:24:33 CEST 2021
+
+# Hints and Notes on Formatting:
+# * You can edit this file then import it back into Logisim!
+# * Anything after a '#' is a comment and will be ignored.
+# * Blank lines and separator lines (e.g., ~~~~~~) are ignored.
+# * Keep column names simple (no spaces, punctuation, etc.)
+# * 'Name[N..0]' indicates an N+1 bit variable, whereas
+# 'Name' by itself indicates a 1-bit variable.
+# * You can use 'x' or '-' to indicate "don't care" for both
+# input and output bits.
+# * You can use binary (e.g., '10100011xxxx') notation or
+# or hex (e.g., 'C3x'). Logisim will figure out which is which.
+
+CurrentState[3..0] | PCWriteCond PCWrite IorD MemRead MemWrite MemtoReg IRWrite CauseWrite IntCause EPCWrite PCSource[1..0] ALUOp[1..0] ALUSrcA ALUSrcB[1..0] RegWrite RegDst
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 0000 | 0 1 0 1 0 0 1 0 0 0 00 00 0 01 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0001 | 0 0 0 0 0 0 0 0 0 0 00 00 0 11 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0010 | 0 0 0 0 0 0 0 0 0 0 00 00 1 10 0 0
+ 0011 | 0 0 1 1 0 0 0 0 0 0 00 00 0 00 0 0
+ 0100 | 0 0 0 0 0 1 0 0 0 0 00 00 0 00 1 0
+ 0101 | 0 0 1 0 1 0 0 0 0 0 00 00 0 00 0 0
+ 0110 | 0 0 0 0 0 0 0 0 0 0 00 10 1 00 0 0
+ 0111 | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 1 1
+ 1000 | 1 0 0 0 0 0 0 0 0 0 01 01 1 00 0 0
+ 1001 | 0 1 0 0 0 0 0 0 0 0 10 00 0 00 0 0
+ 101- | 0 0 0 0 0 0 0 0 0 0 00 00 0 00 0 0
+ 11-- | - - - - - - - - - - -- -- - -- - -