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command-streamer.c
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/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include <stdint.h>
#include <stdbool.h>
#include <signal.h>
#include "ksim.h"
struct gt gt;
static void
unhandled_command(uint32_t *p)
{
ksim_trace(TRACE_CS, "unhandled command\n");
}
/* MI commands */
static void
handle_mi_noop(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_NOOP\n");
}
static void
handle_mi_batch_buffer_end(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_BATCH_BUFFER_END\n");
}
static void
handle_mi_predicate(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_PREDICATE\n");
stub("MI_PREDICATE\n");
}
static void
handle_mi_math(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_MATH\n");
}
#define GEN7_3DPRIM_END_OFFSET 0x2420
#define GEN7_3DPRIM_START_VERTEX 0x2430
#define GEN7_3DPRIM_VERTEX_COUNT 0x2434
#define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
#define GEN7_3DPRIM_START_INSTANCE 0x243C
#define GEN7_3DPRIM_BASE_VERTEX 0x2440
#define GPGPU_DISPATCHDIMX 0x2500
#define GPGPU_DISPATCHDIMY 0x2504
#define GPGPU_DISPATCHDIMZ 0x2508
#define BCS_SWCTRL 0x22200
static void
write_register(uint32_t reg, uint32_t value)
{
switch (reg) {
case GEN7_3DPRIM_END_OFFSET:
break;
case GEN7_3DPRIM_START_VERTEX:
gt.prim.start_vertex = value;
break;
case GEN7_3DPRIM_VERTEX_COUNT:
gt.prim.vertex_count = value;
break;
case GEN7_3DPRIM_INSTANCE_COUNT:
gt.prim.instance_count = value;
break;
case GEN7_3DPRIM_START_INSTANCE:
gt.prim.start_instance = value;
break;
case GEN7_3DPRIM_BASE_VERTEX:
gt.prim.base_vertex = value;
break;
case GPGPU_DISPATCHDIMX:
gt.dispatch.dimx = value;
break;
case GPGPU_DISPATCHDIMY:
gt.dispatch.dimy = value;
break;
case GPGPU_DISPATCHDIMZ:
gt.dispatch.dimz = value;
break;
case BCS_SWCTRL:
gt.blt.swctrl =
(gt.blt.swctrl & ~(value >> 16)) | (value & 0xffff);
break;
}
}
static void
handle_mi_load_register_imm(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_LOAD_REGISTER_IMM\n");
write_register(p[1], p[2]);
}
static void
handle_mi_flush_dw(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_FLUSH_DW\n");
}
static void
handle_mi_load_register_mem(uint32_t *p)
{
uint64_t address = get_u64(&p[2]);
uint64_t range;
uint32_t *value = map_gtt_offset(address, &range);
ksim_trace(TRACE_CS, "MI_LOAD_REGISTER_MEM\n");
ksim_assert(range >= sizeof(*value));
write_register(p[1], *value);
}
static void
handle_mi_atomic(uint32_t *p)
{
ksim_trace(TRACE_CS, "MI_ATOMIC\n");
}
static void
handle_mi_batch_buffer_start(uint32_t *p)
{
struct GEN9_MI_BATCH_BUFFER_START v;
GEN9_MI_BATCH_BUFFER_START_unpack(p, &v);
uint64_t range;
gt.cs.next = map_gtt_offset(v.BatchBufferStartAddress, &range);
gt.cs.end = gt.cs.next + range;
ksim_trace(TRACE_CS, "MI_BATCH_BUFFER_START\n");
}
typedef void (*command_handler_t)(uint32_t *);
static const command_handler_t mi_commands[] = {
[ 0] = handle_mi_noop,
[10] = handle_mi_batch_buffer_end,
[12] = handle_mi_predicate,
[26] = handle_mi_math,
[34] = handle_mi_load_register_imm,
[38] = handle_mi_flush_dw,
[41] = handle_mi_load_register_mem,
[47] = handle_mi_atomic,
[49] = handle_mi_batch_buffer_start
};
static void
handle_xy_setup_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_SETUP_BLT\n");
}
static void
handle_xy_setup_clip_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_SETUP_CLIP_BLT\n");
}
static void
handle_xy_setup_mono_pattern_sl_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_SETUP_MONO_PATTERN_SL_BLT\n");
}
static void
handle_xy_pixel_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_PIXEL_BLT\n");
}
static void
handle_xy_scanlines_pixel_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_SCANLINES_PIXEL_BLT\n");
}
static void
handle_xy_text_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_TEXT_BLT\n");
}
static void
handle_xy_text_immediate_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_TEXT_IMMEDIATE_BLT\n");
}
static void
handle_xy_color_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_COLOR_BLT\n");
}
static void
handle_xy_pat_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_PAT_BLT\n");
}
static void
handle_xy_mono_pat_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_MONO_PAT_BLT\n");
}
static void
handle_xy_src_copy_blt(uint32_t *p)
{
struct blit b;
#define BCS_SWCTRL_SRC_Y (1 << 0)
#define BCS_SWCTRL_DST_Y (1 << 1)
b.raster_op = field(p[1], 16, 23);
b.cpp_log2 = (int[]){ 0, 1, 1, 2 } [field(p[1], 24, 25)];
b.dst_pitch = field(p[1], 0, 15);
b.dst_x0 = field(p[2], 0, 15);
b.dst_y0 = field(p[2], 16, 31);
b.dst_x1 = field(p[3], 0, 15);
b.dst_y1 = field(p[3], 16, 31);
b.dst_offset = get_u64(&p[4]);
if (field(p[0], 11, 11))
b.dst_tile_mode = (gt.blt.swctrl & BCS_SWCTRL_DST_Y ? YMAJOR : XMAJOR);
else
b.dst_tile_mode = LINEAR;
b.src_x = field(p[6], 0, 15);
b.src_y = field(p[6], 16, 31);
b.src_pitch = field(p[7], 0, 15);
b.src_offset = get_u64(&p[8]);
if (field(p[0], 15, 15))
b.src_tile_mode = (gt.blt.swctrl & BCS_SWCTRL_SRC_Y ? YMAJOR : XMAJOR);
else
b.src_tile_mode = LINEAR;
blitter_copy(&b);
ksim_trace(TRACE_CS, "XY_SRC_COPY_BLT\n");
}
static void
handle_xy_mono_src_copy_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_MONO_SRC_COPY_BLT\n");
}
static void
handle_xy_full_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_FULL_BLT\n");
}
static void
handle_xy_full_mono_src_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_FULL_MONO_SRC_BLT\n");
}
static void
handle_xy_full_mono_pattern_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_FULL_MONO_PATTERN_BLT\n");
}
static void
handle_xy_full_mono_pattern_src_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_FULL_MONO_PATTERN_SRC_BLT\n");
}
static void
handle_xy_mono_pat_fixed_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_MONO_PAT_FIXED_BLT\n");
}
static void
handle_xy_pat_blt_immediate(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_PAT_BLT_IMMEDIATE\n");
}
static void
handle_xy_src_copy_chroma_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_SRC_COPY_CHROMA_BLT\n");
}
static void
handle_xy_full_immediate_pattern_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_FULL_IMMEDIATE_PATTERN_BLT\n");
}
static void
handle_xy_full_mono_src_immediate_pattern_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_FULL_MONO_SRC_IMMEDIATE_PATTERN_BLT\n");
}
static void
handle_xy_pat_chroma_blt(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_PAT_CHROMA_BLT\n");
}
static void
handle_xy_pat_chroma_blt_immediate(uint32_t *p)
{
ksim_trace(TRACE_CS, "XY_PAT_CHROMA_BLT_IMMEDIATE\n");
}
static const command_handler_t xy_commands[] = {
[ 1] = handle_xy_setup_blt,
[ 3] = handle_xy_setup_clip_blt,
[ 17] = handle_xy_setup_mono_pattern_sl_blt,
[ 36] = handle_xy_pixel_blt,
[ 37] = handle_xy_scanlines_pixel_blt,
[ 38] = handle_xy_text_blt,
[ 49] = handle_xy_text_immediate_blt,
[ 80] = handle_xy_color_blt,
[ 81] = handle_xy_pat_blt,
[ 82] = handle_xy_mono_pat_blt,
[ 83] = handle_xy_src_copy_blt,
[ 84] = handle_xy_mono_src_copy_blt,
[ 85] = handle_xy_full_blt,
[ 86] = handle_xy_full_mono_src_blt,
[ 87] = handle_xy_full_mono_pattern_blt,
[ 88] = handle_xy_full_mono_pattern_src_blt,
[ 89] = handle_xy_mono_pat_fixed_blt,
[114] = handle_xy_pat_blt_immediate,
[115] = handle_xy_src_copy_chroma_blt,
[116] = handle_xy_full_immediate_pattern_blt,
[117] = handle_xy_full_mono_src_immediate_pattern_blt,
[118] = handle_xy_pat_chroma_blt,
[119] = handle_xy_pat_chroma_blt_immediate
};
static void
handle_state_base_address(uint32_t *p)
{
const uint64_t mask = ~0xfff;
ksim_trace(TRACE_CS, "STATE_BASE_ADDRESS\n");
if (field(p[1], 0, 0))
gt.general_state_base_address = get_u64(&p[1]) & mask;
if (field(p[4], 0, 0))
gt.surface_state_base_address = get_u64(&p[4]) & mask;
if (field(p[6], 0, 0))
gt.dynamic_state_base_address = get_u64(&p[6]) & mask;
if (field(p[8], 0, 0))
gt.indirect_object_base_address = get_u64(&p[8]) & mask;
if (field(p[10], 0, 0))
gt.instruction_base_address = get_u64(&p[10]) & mask;
if (field(p[12], 0, 0))
gt.general_state_buffer_size = p[12] & mask;
if (field(p[13], 0, 0))
gt.dynamic_state_buffer_size = p[13] & mask;
if (field(p[14], 0, 0))
gt.indirect_object_buffer_size = p[14] & mask;
if (field(p[15], 0, 0))
gt.general_instruction_size = p[15] & mask;
}
static void
handle_state_sip(uint32_t *p)
{
ksim_trace(TRACE_CS, "STATE_SIP\n");
gt.sip_address = get_u64(&p[1]);
}
static void
handle_swtess_base_address(uint32_t *p)
{
ksim_trace(TRACE_CS, "SWTESS_BASE_ADDRESS\n");
}
static void
handle_gpgpu_csr_base_address(uint32_t *p)
{
ksim_trace(TRACE_CS, "GPGPU_CSR_BASE_ADDRESS\n");
}
static const command_handler_t nonpipelined_common_commands[] = {
[ 1] = handle_state_base_address,
[ 2] = handle_state_sip,
[ 3] = handle_swtess_base_address,
[ 4] = handle_gpgpu_csr_base_address,
};
static command_handler_t
get_common_command(uint32_t *p)
{
uint32_t h = p[0];
uint32_t opcode = field(h, 24, 26);
uint32_t subopcode = field(h, 16, 23);
if (opcode == 0) { /* pipelined common state */
/* STATE_PREFETCH subopcode 3 */
return NULL;
} else if (opcode == 1) {
return nonpipelined_common_commands[subopcode];
} else {
return NULL;
}
}
static void
handle_pipeline_select(uint32_t *p)
{
ksim_trace(TRACE_CS, "PIPELINE_SELECT\n");
struct GEN9_PIPELINE_SELECT v;
GEN9_PIPELINE_SELECT_unpack(p, &v);
gt.pipeline = v.PipelineSelection;
}
static void
handle_3dstate_vf_statistics(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_VF_STATISTICS\n");
struct GEN9_3DSTATE_VF_STATISTICS v;
GEN9_3DSTATE_VF_STATISTICS_unpack(p, &v);
gt.vf.statistics = v.StatisticsEnable;
}
static command_handler_t
get_dword_command(uint32_t *p)
{
uint32_t h = p[0];
uint32_t opcode = field(h, 24, 26);
uint32_t subopcode = field(h, 16, 23);
/* opcode 0 is pipelined, 1 is non-pipelined. */
if (opcode == 0 && subopcode == 11) {
return handle_3dstate_vf_statistics;
} else if (opcode == 1 && subopcode == 4) {
return handle_pipeline_select;
} else {
return NULL;
}
}
/* Compute commands */
static void
handle_media_curbe_load(uint32_t *p)
{
ksim_trace(TRACE_CS, "MEDIA_CURBE_LOAD\n");
struct GEN9_MEDIA_CURBE_LOAD v;
GEN9_MEDIA_CURBE_LOAD_unpack(p, &v);
const uint64_t offset = v.CURBEDataStartAddress +
gt.dynamic_state_base_address;
uint64_t range;
gt.compute.curbe_data = map_gtt_offset(offset, &range);
ksim_assert(v.CURBETotalDataLength <= range);
}
static void
handle_media_interface_descriptor_load(uint32_t *p)
{
ksim_trace(TRACE_CS, "MEDIA_INTERFACE_DESCRIPTOR_LOAD\n");
struct GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD v;
GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_unpack(p, &v);
const uint64_t offset = v.InterfaceDescriptorDataStartAddress +
gt.dynamic_state_base_address;
uint64_t range;
const uint32_t *desc = map_gtt_offset(offset, &range);
struct GEN9_INTERFACE_DESCRIPTOR_DATA d;
GEN9_INTERFACE_DESCRIPTOR_DATA_unpack(desc, &d);
gt.compute.ksp = d.KernelStartPointer;
gt.compute.binding_table_address = d.BindingTablePointer;
gt.compute.sampler_state_address = d.SamplerStatePointer;
gt.compute.curbe_read_length = d.ConstantURBEntryReadLength;
gt.compute.curbe_read_offset = d.ConstantURBEntryReadOffset;
}
static void
handle_media_state_flush(uint32_t *p)
{
ksim_trace(TRACE_CS, "MEDIA_STATE_FLUSH\n");
struct GEN9_MEDIA_STATE_FLUSH v;
GEN9_MEDIA_STATE_FLUSH_unpack(p, &v);
}
static void
handle_media_vfe_state(uint32_t *p)
{
ksim_trace(TRACE_CS, "MEDIA_VFE_STATE\n");
struct GEN9_MEDIA_VFE_STATE v;
GEN9_MEDIA_VFE_STATE_unpack(p, &v);
gt.compute.scratch_pointer = v.ScratchSpaceBasePointer;
gt.compute.scratch_size = v.PerThreadScratchSpace;
}
static void
handle_gpgpu_walker(uint32_t *p)
{
ksim_trace(TRACE_CS, "GPGPU_WALKER\n");
struct GEN9_GPGPU_WALKER v;
GEN9_GPGPU_WALKER_unpack(p, &v);
gt.compute.simd_size = v.SIMDSize;
gt.compute.depth = v.ThreadDepthCounterMaximum + 1;
gt.compute.height = v.ThreadHeightCounterMaximum + 1;
gt.compute.width = v.ThreadWidthCounterMaximum + 1;
gt.compute.start_x = v.ThreadGroupIDStartingX;
gt.compute.end_x = v.ThreadGroupIDXDimension;
gt.compute.start_y = v.ThreadGroupIDStartingY;
gt.compute.end_y = v.ThreadGroupIDYDimension;
gt.compute.start_z = v.ThreadGroupIDStartingResumeZ;
gt.compute.end_z = v.ThreadGroupIDZDimension;
gt.compute.right_mask = v.RightExecutionMask;
gt.compute.bottom_mask = v.BottomExecutionMask;
dispatch_compute();
}
static command_handler_t
get_compute_command(uint32_t *p)
{
uint32_t h = p[0];
uint32_t opcode = field(h, 24, 26);
uint32_t subopcode = field(h, 16, 23);
switch (opcode) {
case 0:
if (subopcode == 0)
return handle_media_vfe_state;
else if (subopcode == 1)
return handle_media_curbe_load;
else if (subopcode == 2)
return handle_media_interface_descriptor_load;
else if (subopcode == 4)
return handle_media_state_flush;
else
return NULL;
case 1:
if (subopcode == 5)
return handle_gpgpu_walker;
else
return NULL;
default:
return NULL;
}
}
/* Pipelined 3dstate commands */
static void
handle_3dstate_clear_params(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CLEAR_PARAMS\n");
struct GEN9_3DSTATE_CLEAR_PARAMS v;
GEN9_3DSTATE_CLEAR_PARAMS_unpack(p, &v);
if (v.DepthClearValueValid)
gt.depth.clear_value = v.DepthClearValue;
}
static void
handle_3dstate_depth_buffer(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_DEPTH_BUFFER\n");
struct GEN9_3DSTATE_DEPTH_BUFFER v;
GEN9_3DSTATE_DEPTH_BUFFER_unpack(p, &v);
gt.depth.address = v.SurfaceBaseAddress;
gt.depth.width = v.Width + 1;
gt.depth.height = v.Height + 1;
gt.depth.stride = v.SurfacePitch + 1;
gt.depth.format = v.SurfaceFormat;
gt.depth.write_enable0 = v.DepthWriteEnable;
gt.depth.hiz_enable = v.HierarchicalDepthBufferEnable;
}
static void
handle_3dstate_stencil_buffer(uint32_t *p)
{
struct GEN9_3DSTATE_STENCIL_BUFFER v;
GEN9_3DSTATE_STENCIL_BUFFER_unpack(p, &v);
ksim_trace(TRACE_CS, "3DSTATE_STENCIL_BUFFER\n");
}
static void
handle_3dstate_hier_depth_buffer(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_HIER_DEPTH_BUFFER\n");
struct GEN9_3DSTATE_HIER_DEPTH_BUFFER v;
GEN9_3DSTATE_HIER_DEPTH_BUFFER_unpack(p, &v);
gt.depth.hiz_address = v.SurfaceBaseAddress;
gt.depth.hiz_stride = v.SurfacePitch + 1;
}
static void
handle_3dstate_vertex_buffers(uint32_t *p)
{
uint32_t h = p[0];
uint32_t length = field(h, 0, 7) + 2;
ksim_trace(TRACE_CS, "3DSTATE_VERTEX_BUFFERS\n");
ksim_assert((length - 1) % 4 == 0);
for (uint32_t i = 1; i < length; i += 4) {
uint32_t vb = field(p[i], 26, 31);
bool modify_address = field(p[i], 14, 14);
gt.vf.vb[vb].pitch = field(p[i], 0, 11);
if (modify_address)
gt.vf.vb[vb].address = * (uint64_t *) &p[i + 1];
gt.vf.vb[vb].size = p[i + 3];
gt.vf.vb_valid |= 1 << vb;
}
}
static void
handle_3dstate_vertex_elements(uint32_t *p)
{
uint32_t h = p[0];
uint32_t length = field(h, 0, 7) + 2;
ksim_trace(TRACE_CS, "3DSTATE_VERTEX_ELEMENTS\n");
ksim_assert((length - 1) % 2 == 0);
for (uint32_t i = 1, n = 0; i < length; i += 2, n++) {
gt.vf.ve[n].vb = field(p[i], 26, 31);
gt.vf.ve[n].valid = field(p[i], 25, 25);
gt.vf.ve[n].format = field(p[i], 16, 24);
gt.vf.ve[n].edgeflag = field(p[i], 15, 15);
gt.vf.ve[n].offset = field(p[i], 0, 11);
gt.vf.ve[n].cc[0] = field(p[i + 1], 28, 30);
gt.vf.ve[n].cc[1] = field(p[i + 1], 24, 26);
gt.vf.ve[n].cc[2] = field(p[i + 1], 20, 22);
gt.vf.ve[n].cc[3] = field(p[i + 1], 16, 18);
}
gt.vf.ve_count = (length - 1) / 2;
}
static void
handle_3dstate_index_buffer(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_INDEX_BUFFER\n");
struct GEN9_3DSTATE_INDEX_BUFFER v;
GEN9_3DSTATE_INDEX_BUFFER_unpack(p, &v);
gt.vf.ib.format = v.IndexFormat;
gt.vf.ib.address = get_u64(&p[2]);
gt.vf.ib.size = v.BufferSize;
}
static void
handle_3dstate_vf(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_VF\n");
struct GEN9_3DSTATE_VF v;
GEN9_3DSTATE_VF_unpack(p, &v);
gt.vf.cut_index = v.CutIndex;
}
static void
handle_3dstate_multisample(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_MULTISAMPLE\n");
}
static void
handle_3dstate_cc_state_pointers(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CC_STATE_POINTERS\n");
struct GEN9_3DSTATE_CC_STATE_POINTERS v;
GEN9_3DSTATE_CC_STATE_POINTERS_unpack(p, &v);
if (v.ColorCalcStatePointerValid)
gt.cc.state = v.ColorCalcStatePointer;
}
static void
handle_3dstate_scissor_state_pointers(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_SCISSOR_STATE_POINTERS\n");
struct GEN9_3DSTATE_SCISSOR_STATE_POINTERS v;
GEN9_3DSTATE_SCISSOR_STATE_POINTERS_unpack(p, &v);
const uint64_t offset = v.ScissorRectPointer +
gt.dynamic_state_base_address;
uint64_t range;
void *srp = map_gtt_offset(offset, &range);
ksim_assert(GEN9_SCISSOR_RECT_length <= range);
struct GEN9_SCISSOR_RECT rect;
GEN9_SCISSOR_RECT_unpack(srp, &rect);
gt.wm.scissor_rect.x0 = rect.ScissorRectangleXMin;
gt.wm.scissor_rect.y0 = rect.ScissorRectangleYMin;
gt.wm.scissor_rect.x1 = rect.ScissorRectangleXMax;
gt.wm.scissor_rect.y1 = rect.ScissorRectangleYMax;
}
static void
handle_3dstate_vs(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_VS\n");
struct GEN9_3DSTATE_VS v;
GEN9_3DSTATE_VS_unpack(p, &v);
gt.vs.ksp = v.KernelStartPointer;
gt.vs.single_dispatch = v.SingleVertexDispatch;
gt.vs.vector_mask = v.VectorMaskEnable;
gt.vs.binding_table_entry_count = v.BindingTableEntryCount;
gt.vs.priority = v.ThreadDispatchPriority;
gt.vs.alternate_fp = v.FloatingPointMode;
gt.vs.opcode_exception = v.IllegalOpcodeExceptionEnable;
gt.vs.access_uav = v.AccessesUAV;
gt.vs.sw_exception = v.SoftwareExceptionEnable;
gt.vs.scratch_pointer = v.ScratchSpaceBasePointer;
gt.vs.scratch_size = v.PerThreadScratchSpace;
gt.vs.urb_start_grf = v.DispatchGRFStartRegisterForURBData;
gt.vs.vue_read_length = v.VertexURBEntryReadLength;
gt.vs.vue_read_offset = v.VertexURBEntryReadOffset;
gt.vs.statistics = v.StatisticsEnable;
gt.vs.simd8 = v.SIMD8DispatchEnable;
gt.vs.enable = v.Enable;
}
static void
handle_3dstate_gs(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_GS\n");
struct GEN9_3DSTATE_GS v;
GEN9_3DSTATE_GS_unpack(p, &v);
gt.gs.enable = v.Enable;
gt.gs.ksp = v.KernelStartPointer;
gt.gs.dispatch_mode = v.DispatchMode;
gt.gs.include_primitive_id = v.IncludePrimitiveID;
gt.gs.include_vertex_handles = v.IncludeVertexHandles;
gt.gs.instance_count = v.InstanceControl + 1;
gt.gs.urb_start_grf = v.DispatchGRFStartRegisterForURBData;
gt.gs.vue_read_length = v.VertexURBEntryReadLength;
gt.gs.vue_read_offset = v.VertexURBEntryReadOffset;
gt.gs.hint = v.Hint;
gt.gs.statistics = v.StatisticsEnable;
gt.gs.expected_vertex_count = v.ExpectedVertexCount;
gt.gs.static_output = v.StaticOutput;
gt.gs.static_output_vertex_count = v.StaticOutputVertexCount;
gt.gs.control_data_header_size = v.ControlDataHeaderSize;
gt.gs.control_data_format = v.ControlDataFormat;
gt.gs.output_vertex_size = v.OutputVertexSize + 1;
gt.gs.output_topology = v.OutputTopology;
}
static void
handle_3dstate_clip(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CLIP\n");
struct GEN9_3DSTATE_CLIP v;
GEN9_3DSTATE_CLIP_unpack(p, &v);
gt.clip.perspective_divide_disable = v.PerspectiveDivideDisable;
gt.clip.guardband_clip_test_enable = v.GuardbandClipTestEnable;
gt.clip.viewport_clip_test_enable = v.ViewportXYClipTestEnable;
}
static void
handle_3dstate_sf(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_SF\n");
struct GEN9_3DSTATE_SF v;
GEN9_3DSTATE_SF_unpack(p, &v);
gt.sf.line_width = v.LineWidth;
gt.sf.viewport_transform_enable = v.ViewportTransformEnable;
gt.sf.tri_strip_provoking = v.TriangleStripListProvokingVertexSelect;
gt.sf.line_strip_provoking = v.LineStripListProvokingVertexSelect;
gt.sf.tri_fan_provoking = v.TriangleFanProvokingVertexSelect;
}
static void
handle_3dstate_wm(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_WM\n");
struct GEN9_3DSTATE_WM v;
GEN9_3DSTATE_WM_unpack(p, &v);
gt.wm.barycentric_mode = v.BarycentricInterpolationMode;
}
static void
fill_curbe(struct curbe *c, uint32_t *p)
{
struct GEN9_3DSTATE_CONSTANT_BODY v;
GEN9_3DSTATE_CONSTANT_BODY_unpack(&p[1], &v);
for (uint32_t i = 0; i < 4; i++) {
c->buffer[i].length = v.ReadLength[i];
c->buffer[i].address = v.Buffer[i];
}
}
static void
handle_3dstate_constant_vs(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CONSTANT_VS\n");
fill_curbe(>.vs.curbe, p);
}
static void
handle_3dstate_constant_gs(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CONSTANT_GS\n");
fill_curbe(>.gs.curbe, p);
}
static void
handle_3dstate_constant_ps(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CONSTANT_PS\n");
fill_curbe(>.ps.curbe, p);
}
static void
handle_3dstate_sample_mask(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_SAMPLE_MASK\n");
}
static void
handle_3dstate_constant_hs(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CONSTANT_HS\n");
fill_curbe(>.hs.curbe, p);
}
static void
handle_3dstate_constant_ds(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_CONSTANT_DS\n");
fill_curbe(>.ds.curbe, p);
}
static void
handle_3dstate_hs(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_HS\n");
struct GEN9_3DSTATE_HS v;
GEN9_3DSTATE_HS_unpack(p, &v);
gt.hs.ksp = v.KernelStartPointer;
gt.hs.enable = v.Enable;
gt.hs.statistics = v.StatisticsEnable;
gt.hs.instance_count = v.InstanceCount;
gt.hs.include_vertex_handles = v.IncludeVertexHandles;
gt.hs.urb_start_grf = v.DispatchGRFStartRegisterForURBData;
gt.hs.dispatch_mode = v.DispatchMode;
gt.hs.vue_read_length = v.VertexURBEntryReadLength;
gt.hs.vue_read_offset = v.VertexURBEntryReadOffset;
}
static void
handle_3dstate_te(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_TE\n");
struct GEN9_3DSTATE_TE v;
GEN9_3DSTATE_TE_unpack(p, &v);
gt.te.partitioning = v.Partitioning;
gt.te.topology = v.OutputTopology;
gt.te.domain = v.TEDomain;
gt.te.enable = v.TEEnable;
}
static void
handle_3dstate_ds(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_DS\n");
struct GEN9_3DSTATE_DS v;
GEN9_3DSTATE_DS_unpack(p, &v);
gt.ds.ksp = v.KernelStartPointer;
gt.ds.enable = v.Enable;
gt.ds.statistics = v.StatisticsEnable;
gt.ds.urb_start_grf = v.DispatchGRFStartRegisterForURBData;
gt.ds.pue_read_length = v.PatchURBEntryReadLength;
gt.ds.pue_read_offset = v.PatchURBEntryReadOffset;
gt.ds.compute_w = v.ComputeWCoordinateEnable;
gt.ds.dispatch_mode = v.DispatchMode;
}
static void
handle_3dstate_steamout(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_STEAMOUT\n");
}
static void
handle_3dstate_sbe(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_SBE\n");
struct GEN9_3DSTATE_SBE v;
GEN9_3DSTATE_SBE_unpack(p, &v);
gt.sbe.read_offset = v.VertexURBEntryReadOffset;
gt.sbe.num_attributes = v.NumberofSFOutputAttributes;
gt.sbe.swiz_enable = v.AttributeSwizzleEnable;
}
static void
handle_3dstate_ps(uint32_t *p)
{
ksim_trace(TRACE_CS, "3DSTATE_PS\n");
struct GEN9_3DSTATE_PS v;
GEN9_3DSTATE_PS_unpack(p, &v);
gt.ps.rounding_mode = v.RoundingMode;
gt.ps.denormal_mode = v.SinglePrecisionDenormalMode;
gt.ps.ksp0 = v.KernelStartPointer0;
gt.ps.ksp1 = v.KernelStartPointer1;
gt.ps.ksp2 = v.KernelStartPointer2;