diff --git a/compiler/src/iree/compiler/Codegen/Common/LinkTuningSpecsPass.cpp b/compiler/src/iree/compiler/Codegen/Common/LinkTuningSpecsPass.cpp index a13f3802bec2..ab9ddce82dd0 100644 --- a/compiler/src/iree/compiler/Codegen/Common/LinkTuningSpecsPass.cpp +++ b/compiler/src/iree/compiler/Codegen/Common/LinkTuningSpecsPass.cpp @@ -35,19 +35,17 @@ using mlir::transform::NamedSequenceOp; static SmallVector findNestedModulesWithNamedSequences(ModuleOp module) { Block *body = module.getBody(); - return llvm::to_vector( - llvm::make_filter_range(body->getOps(), [](ModuleOp op) { - return op.getSymName().has_value() && - op->hasAttr( - transform::TransformDialect::kWithNamedSequenceAttrName); - })); + return llvm::filter_to_vector(body->getOps(), [](ModuleOp op) { + return op.getSymName().has_value() && + op->hasAttr(transform::TransformDialect::kWithNamedSequenceAttrName); + }); } static SmallVector findTuningSpecs(ModuleOp module) { Block *body = module.getBody(); - return llvm::to_vector(llvm::make_filter_range( + return llvm::filter_to_vector( body->getOps(), - [](NamedSequenceOp op) { return op->hasAttr(kTuningSpecAttrName); })); + [](NamedSequenceOp op) { return op->hasAttr(kTuningSpecAttrName); }); } static LogicalResult validateTuningSpec(NamedSequenceOp op) { diff --git a/compiler/src/iree/compiler/Codegen/Common/ReconcileTranslationInfo.cpp b/compiler/src/iree/compiler/Codegen/Common/ReconcileTranslationInfo.cpp index 0fc04f80baff..714e50a5d5fd 100644 --- a/compiler/src/iree/compiler/Codegen/Common/ReconcileTranslationInfo.cpp +++ b/compiler/src/iree/compiler/Codegen/Common/ReconcileTranslationInfo.cpp @@ -265,8 +265,8 @@ static LogicalResult resolveWorkgroupForAll(RewriterBase &rewriter, } auto forAllOps = body.getOps(); - SmallVector workgroupForAllOps = llvm::to_vector( - llvm::make_filter_range(forAllOps, [&](scf::ForallOp forAllOp) { + SmallVector workgroupForAllOps = + llvm::filter_to_vector(forAllOps, [&](scf::ForallOp forAllOp) { auto mapping = forAllOp.getMapping(); if (!mapping) { return false; @@ -277,7 +277,7 @@ static LogicalResult resolveWorkgroupForAll(RewriterBase &rewriter, return false; } return true; - })); + }); if (workgroupForAllOps.empty()) { // If there are no workgroup distribution loops, set the default diff --git a/compiler/src/iree/compiler/Codegen/Interfaces/PartitionableLoopsInterface.cpp b/compiler/src/iree/compiler/Codegen/Interfaces/PartitionableLoopsInterface.cpp index 94be437540e3..f669b5e0e17b 100644 --- a/compiler/src/iree/compiler/Codegen/Interfaces/PartitionableLoopsInterface.cpp +++ b/compiler/src/iree/compiler/Codegen/Interfaces/PartitionableLoopsInterface.cpp @@ -11,6 +11,7 @@ #include "iree/compiler/Dialect/LinalgExt/IR/LinalgExtDialect.h" #include "iree/compiler/Dialect/LinalgExt/IR/LinalgExtOps.h" #include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/SmallVectorExtras.h" #include "mlir/Dialect/Linalg/IR/Linalg.h" #include "mlir/Dialect/Tensor/IR/Tensor.h" #include "mlir/IR/BuiltinTypes.h" @@ -26,10 +27,9 @@ namespace mlir::iree_compiler { static llvm::SmallVector pruneUnitTripParallelLoops(llvm::ArrayRef parallelLoops, llvm::ArrayRef loopRanges) { - return llvm::to_vector( - llvm::make_filter_range(parallelLoops, [&loopRanges](unsigned loopDim) { - return loopRanges[loopDim] != 1; - })); + return llvm::filter_to_vector(parallelLoops, [&loopRanges](unsigned loopDim) { + return loopRanges[loopDim] != 1; + }); } /// Returns the partitionable loops for all Linalg ops. diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp index a5fb9bf313a7..bdb252745a2a 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp +++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/KernelDispatch.cpp @@ -17,6 +17,7 @@ #include "iree/compiler/Dialect/HAL/IR/HALTypes.h" #include "iree/compiler/Dialect/LinalgExt/IR/LinalgExtOps.h" #include "iree/compiler/Dialect/LinalgExt/Utils/IndexingUtils.h" +#include "llvm/ADT/SmallVectorExtras.h" #include "llvm/ADT/TypeSwitch.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" @@ -2784,10 +2785,10 @@ adjustTileSizesForUnPackOp(mlir::FunctionOpInterface entryPointFn, // Remove the "enable_loop_peeling" attr from pipelineConfig auto enableLoopPeelingAttrName = getEnableLoopPeelingAttrName(rootOp->getContext()); - auto newPipelineConfigEntries = llvm::to_vector(llvm::make_filter_range( + auto newPipelineConfigEntries = llvm::filter_to_vector( pipelineConfig.getValue(), [&](NamedAttribute entry) { return entry.getName() != enableLoopPeelingAttrName; - })); + }); pipelineConfig = DictionaryAttr::get(rootOp->getContext(), newPipelineConfigEntries); diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVMaterializeExecutableConditions.cpp b/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVMaterializeExecutableConditions.cpp index 0228656f57a0..57508cbdc2a2 100644 --- a/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVMaterializeExecutableConditions.cpp +++ b/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVMaterializeExecutableConditions.cpp @@ -8,6 +8,7 @@ #include "iree/compiler/Codegen/SPIRV/Utils.h" #include "iree/compiler/Dialect/HAL/IR/HALOps.h" #include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVectorExtras.h" #include "mlir/Dialect/Arith/IR/Arith.h" #include "mlir/Dialect/SPIRV/IR/SPIRVAttributes.h" #include "mlir/Dialect/SPIRV/IR/SPIRVEnums.h" @@ -322,10 +323,10 @@ struct SPIRVMaterializeExecutableConditionsPass final // Drop the fine-grained SPIR-V target and add the course-grained device // queries as a list. - auto dictKeyValues = llvm::to_vector(llvm::make_filter_range( + auto dictKeyValues = llvm::filter_to_vector( configuration.getValue(), [](NamedAttribute attr) { return attr.getName() != spirv::getTargetEnvAttrName(); - })); + }); dictKeyValues.emplace_back(builder.getStringAttr("iree.spirv.features"), builder.getStrArrayAttr(queries)); variantOp.setTargetAttr(IREE::HAL::ExecutableTargetAttr::get( diff --git a/compiler/src/iree/compiler/Dialect/Stream/Transforms/ScheduleAllocation.cpp b/compiler/src/iree/compiler/Dialect/Stream/Transforms/ScheduleAllocation.cpp index 7741d26651b8..e0b3fbfe93e9 100644 --- a/compiler/src/iree/compiler/Dialect/Stream/Transforms/ScheduleAllocation.cpp +++ b/compiler/src/iree/compiler/Dialect/Stream/Transforms/ScheduleAllocation.cpp @@ -102,10 +102,10 @@ static void computeRegionValueAliases(Operation *regionOp, // Filter out to only resource results - some regions may return additional // things like stream.async.execute returning a timepoint. - auto resourceResults = llvm::to_vector_of( - llvm::make_filter_range(regionOp->getResults(), [](OpResult result) { + auto resourceResults = + llvm::filter_to_vector(regionOp->getResults(), [](OpResult result) { return llvm::isa(result.getType()); - })); + }); // Start with outputs so that we handle tied values that may lead all the way // back up the chain to the stream inputs. @@ -1145,12 +1145,12 @@ static std::optional extractConstantsWithLifetime(IREE::Stream::AsyncExecuteOp executeOp, IREE::Stream::Lifetime lifetime, OpBuilder &externalBuilder) { - auto constantOps = llvm::to_vector(llvm::make_filter_range( + auto constantOps = llvm::filter_to_vector( executeOp.getOps(), [&](IREE::Stream::AsyncConstantOp op) { return cast(op.getResult().getType()) .getLifetime() == lifetime; - })); + }); if (constantOps.empty()) return {};