SSD1322 in 16-bit mode with AVR HW SPI? #1644

Grantiscool · 2021-10-19T17:42:54Z

Grantiscool
Oct 19, 2021

Hi,

I have the SSD1322 working well on an ATMega1284 in 8-bit mode, but no display/occasional corruption when i enable 16-bit mode in u8g2.h . I'm using the following callback code, for 4-wire HW SPI (I can't find the original source!):

u8g2_t u8g2;
uint8_t u8x8_byte_avr_hw_spi (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
 uint8_t *data;

 switch (msg) {
   case U8X8_MSG_BYTE_INIT:
     SCK_DDR |= _BV (SCK_BIT);
     MOSI_DDR |= _BV (MOSI_BIT);

     SPCR = (_BV (SPE) | _BV (MSTR));

     switch (u8x8->display_info->spi_mode) {
       case 0:
         break;
       case 1:
         SPCR |= _BV (CPHA);
         break;
       case 2:
         SPCR |= _BV (CPOL);
         break;
       case 3:
         SPCR |= _BV (CPOL);
         SPCR |= _BV (CPHA);
         break;
     };

     switch (F_CPU / u8x8->display_info->sck_clock_hz) {
       case 2:
         SPSR |= _BV (SPI2X);
         break;
       case 4:
         break;
       case 8:
         SPSR |= _BV (SPI2X);
         SPCR |= _BV (SPR0);
         break;
       case 16:
         SPCR |= _BV (SPR0);
         break;
       case 32:
         SPSR |= _BV (SPI2X);
         SPCR |= _BV (SPR1);
         break;
       case 64:
         SPCR |= _BV (SPR1);
         break;
       case 128:
         SPCR |= _BV (SPR1);
         SPCR |= _BV (SPR0);
         break;
     }

     u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
     break;
   case U8X8_MSG_BYTE_SET_DC:
     u8x8_gpio_SetDC(u8x8, arg_int);
     break;
   case U8X8_MSG_BYTE_START_TRANSFER:
     u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level);
     u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL);
     break;
   case U8X8_MSG_BYTE_SEND:
     data = (uint8_t *) arg_ptr;
     while (arg_int > 0) {
         SPDR = (uint8_t) * data;
         while (!(SPSR & _BV (SPIF)));
         data++;
         arg_int--;
     }
     break;
   case U8X8_MSG_BYTE_END_TRANSFER:
     u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL);
     u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
     break;
   default:
     return 0;
 }
 
 return 1;
}
//
uint8_t u8x8_avr_delay (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
   uint8_t cycles;

   switch(msg) {
   	case U8X8_MSG_DELAY_NANO:  // delay arg_int * 1 nano second
   		// At 20Mhz, each cycle is 50ns, the call itself is slower.
   		break;
   	case U8X8_MSG_DELAY_100NANO:       // delay arg_int * 100 nano seconds
   		// Approximate best case values...
   		#define CALL_CYCLES 26UL
   		#define CALC_CYCLES 4UL
   		#define RETURN_CYCLES 4UL
   		#define CYCLES_PER_LOOP 4UL

   		cycles = (100UL * arg_int) / (P_CPU_NS * CYCLES_PER_LOOP);

   		if (cycles > CALL_CYCLES + RETURN_CYCLES + CALC_CYCLES)
   			break;

   		__asm__ __volatile__ (
   		  "1: sbiw %0,1" "\n\t"  // 2 cycles
   		  "brne 1b":"=w" (cycles):"0" (cycles)  // 2 cycles
   		);
   		break;
   	case U8X8_MSG_DELAY_10MICRO: // delay arg_int * 10 micro seconds
   		while( arg_int-- ) _delay_us(10);
   		break;
   	case U8X8_MSG_DELAY_MILLI:  // delay arg_int * 1 milli second
   		while( arg_int-- ) _delay_ms(1);
   		break;
   	default:
   		return 0;
   }

   return 1;
}
//
uint8_t u8x8_avr_gpio_and_delay (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
 // Re-use library for delays
 if (u8x8_avr_delay(u8x8, msg, arg_int, arg_ptr))
   return 1;

 switch (msg) {
   // called once during init phase of u8g2/u8x8
   // can be used to setup pins
   case U8X8_MSG_GPIO_AND_DELAY_INIT:
     CS_DDR |= _BV(CS_BIT);
     DC_DDR |= _BV(DC_BIT);
     RESET_DDR |= _BV(RESET_BIT);
     break;
   // CS (chip select) pin: Output level in arg_int
   case U8X8_MSG_GPIO_CS:
     if (arg_int)
       CS_PORT |= _BV(CS_BIT);
     else
       CS_PORT &= ~_BV(CS_BIT);
     break;
   // DC (data/cmd, A0, register select) pin: Output level in arg_int
   case U8X8_MSG_GPIO_DC:
     if (arg_int)
       DC_PORT |= _BV(DC_BIT);
     else
       DC_PORT &= ~_BV(DC_BIT);
     break;
   // Reset pin: Output level in arg_int
   case U8X8_MSG_GPIO_RESET:
     if (arg_int)
       RESET_PORT |= _BV(RESET_BIT);
     else
       RESET_PORT &= ~_BV(RESET_BIT);
     break;
   default:
     u8x8_SetGPIOResult(u8x8, 1);
     break;
 }
 return 1;
}

Not really sure what to change, as all the callbacks relate to u8x8, which i understand to be 8-bit. Changing from half to full buffer makes no difference. I have a feeling the CS pin needs told to stay low for a byte longer?

Any help appreciated!

Cheers!

olikraus · 2021-10-19T20:18:50Z

olikraus
Oct 19, 2021
Maintainer

16 bit mode has no influence on u8x8.
16 bit just changes the calculcation in u8g2 layer. The above mentioned code is not at all affected by 16 bit mode

4 replies

Grantiscool Oct 20, 2021
Author

Hi,

Here's some simplified code with results:


//INCLUDES:
#include <xc.h>
#include <stdio.h>
#include <avr/io.h>
#include <util/delay.h> 
#include "u8g2.h"
#include "u8x8.h"

//DEFINES:
#define F_CPU 8000000UL
#define P_CPU_NS (1000000000UL / F_CPU)
#define SCK_DDR DDRB
#define SCK_BIT 7
#define MOSI_DDR DDRB
#define MOSI_PORT PORTB
#define MOSI_BIT 5
#define RESET_DDR DDRB
#define RESET_PORT PORTB
#define RESET_BIT 2
#define DC_DDR DDRB
#define DC_PORT PORTB
#define DC_BIT 3
#define CS_DDR DDRB
#define CS_PORT PORTB
#define CS_BIT 4

#define PCS_VOL 4
#define PCS_LO 3
#define PCS_MD 2
#define PCS_HI 1

//PROTOTYPES:

uint8_t u8x8_byte_avr_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,void *arg_ptr);
//U8G2 SETUP:
u8g2_t u8g2;
uint8_t u8x8_byte_avr_hw_spi (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
  uint8_t *data;

  switch (msg) {
    case U8X8_MSG_BYTE_INIT:
      SCK_DDR |= _BV (SCK_BIT);
      MOSI_DDR |= _BV (MOSI_BIT);

      SPCR = (_BV (SPE) | _BV (MSTR));

      switch (u8x8->display_info->spi_mode) {
        case 0:
          break;
        case 1:
          SPCR |= _BV (CPHA);
          break;
        case 2:
          SPCR |= _BV (CPOL);
          break;
        case 3:
          SPCR |= _BV (CPOL);
          SPCR |= _BV (CPHA);
          break;
      };

      switch (F_CPU / u8x8->display_info->sck_clock_hz) {
        case 2:
          SPSR |= _BV (SPI2X);
          break;
        case 4:
          break;
        case 8:
          SPSR |= _BV (SPI2X);
          SPCR |= _BV (SPR0);
          break;
        case 16:
          SPCR |= _BV (SPR0);
          break;
        case 32:
          SPSR |= _BV (SPI2X);
          SPCR |= _BV (SPR1);
          break;
        case 64:
          SPCR |= _BV (SPR1);
          break;
        case 128:
          SPCR |= _BV (SPR1);
          SPCR |= _BV (SPR0);
          break;
      }

      u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
      break;
    case U8X8_MSG_BYTE_SET_DC:
      u8x8_gpio_SetDC(u8x8, arg_int);
      break;
    case U8X8_MSG_BYTE_START_TRANSFER:
      u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level);
      u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL);
      break;
    case U8X8_MSG_BYTE_SEND:
      data = (uint8_t *) arg_ptr;
      while (arg_int > 0) {
          SPDR = (uint8_t) * data;
          while (!(SPSR & _BV (SPIF)));
          data++;
          arg_int--;
      }
      break;
    case U8X8_MSG_BYTE_END_TRANSFER:
      u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL);
      u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
      break;
    default:
      return 0;
  }
  
  return 1;
}
//
uint8_t u8x8_avr_delay (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
	uint8_t cycles;

	switch(msg) {
		case U8X8_MSG_DELAY_NANO:  
        break;
		case U8X8_MSG_DELAY_100NANO:
			#define CALL_CYCLES 26UL
			#define CALC_CYCLES 4UL
			#define RETURN_CYCLES 4UL
			#define CYCLES_PER_LOOP 4UL

			cycles = (100UL * arg_int) / (P_CPU_NS * CYCLES_PER_LOOP);

			if (cycles > CALL_CYCLES + RETURN_CYCLES + CALC_CYCLES)
				break;

			__asm__ __volatile__ (
			  "1: sbiw %0,1" "\n\t" 
			  "brne 1b":"=w" (cycles):"0" (cycles) 
			);
			break;
		case U8X8_MSG_DELAY_10MICRO: 
			while( arg_int-- ) _delay_us(10);
			break;
		case U8X8_MSG_DELAY_MILLI: 
			while( arg_int-- ) _delay_ms(1);
			break;
		default:
			return 0;
	}

	return 1;
}
//
uint8_t u8x8_avr_gpio_and_delay (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
  if (u8x8_avr_delay(u8x8, msg, arg_int, arg_ptr))
    return 1;

  switch (msg) {
   
    case U8X8_MSG_GPIO_AND_DELAY_INIT:
      CS_DDR |= _BV(CS_BIT);
      DC_DDR |= _BV(DC_BIT);
      RESET_DDR |= _BV(RESET_BIT);
      break;
   
    case U8X8_MSG_GPIO_CS:
      if (arg_int)
        CS_PORT |= _BV(CS_BIT);
      else
        CS_PORT &= ~_BV(CS_BIT);
      break;
      
    case U8X8_MSG_GPIO_DC:
      if (arg_int)
        DC_PORT |= _BV(DC_BIT);
      else
        DC_PORT &= ~_BV(DC_BIT);
      break;
      
    case U8X8_MSG_GPIO_RESET:
      if (arg_int)
        RESET_PORT |= _BV(RESET_BIT);
      else
        RESET_PORT &= ~_BV(RESET_BIT);
      break;
    default:
      u8x8_SetGPIOResult(u8x8, 1);
      break;
  }
  return 1;
}

void main(void) {
    u8g2_Setup_ssd1322_nhd_256x64_f(&u8g2, U8G2_R2, u8x8_byte_avr_hw_spi, u8x8_avr_gpio_and_delay);  
    u8g2_InitDisplay(&u8g2);
    u8g2_SetPowerSave(&u8g2, 0);
    u8g2_DrawFrame(&u8g2, 80,2,50,50);
    u8g2_DrawBox(&u8g2, 2,2,50,50);
    u8g2_SetFont(&u8g2, u8g2_font_VCR_OSD_tu);
    u8g2_DrawStr(&u8g2, 180, 30, "HELLO");
    u8g2_SendBuffer(&u8g2);
    u8g2_ClearBuffer(&u8g2); 
    
    while(1){
    }
}

8-bit mode, u8g2_Setup_ssd1322_nhd_256x64_f:

8-bit mode, u8g2_Setup_ssd1322_nhd_256x64_2:

16-bit mode, u8g2_Setup_ssd1322_nhd_256x64_f:

16-bit mode, u8g2_Setup_ssd1322_nhd_256x64_2:

:

Problems persist when software SPI is used. The closest I can get to a part number is "TZT NEW OLED Display 2.8"", sourced from AliExpress (don't know if it's okay to post external links). Cheers for any help, if you have the time!

-G

Grantiscool Oct 23, 2021
Author

Update:

switch (F_CPU / u8x8->display_info->sck_clock_hz)
If my F_CPU == 8000000, and sck_clock_hz is defaulted to 10000000, and they're integers... you get the picture. Or more accurately, no picture. Oops! I set sck_clock_hz to 2000000, and now correct case is reached.

I had largely ignored this as the U8G2 reference document explicitly mentioned Arduino, but its importance was staring me right in the face. Didn't think to check with a scope due to some states working.

So now (with AVR hardware SPI bus clock @ 4MHz):

All buffer modes work fine in 8-bit mode
Only full buffer mode works in 16-bit mode. Still, progress!
In 16-bit mode, U8G2_R0 displays text, U8G2_R2 does not. Both DrawFrame and DrawBox extend infinitely off the bottom of the display in both rotation modes. Artefacts from my puny 4MHz SCK?

I'll keep poking around. Cheers! Sorry if none of this is helpful, still learning.

-G

olikraus Oct 24, 2021
Maintainer

Thanks for your updates. Nice pictures.

Grantiscool Oct 24, 2021
Author

No probs. There's just something off, which is causing stretched vertical lines, highly order-sensitive draw operations and artefacting. Adjusting the clock and scaler register in the SSD1322 startup sequence has an effect, but no combination really fixes things. There's also an unpredictable interaction between what the startup remapping is set to and what U8G2_Rn is set to - in some combinations (not the default) text will show.

For the most part, the display is predictably and repeatably missing something. Any idea what would change for the Y-axis in 16 bit mode, that the SSD1322 doesn't like?

If i don't figure it out by reading and tweaking code for a while longer, i'll take a scope reading of a DrawFrame transmission.

Grantiscool · 2021-10-19T20:59:53Z

Grantiscool
Oct 19, 2021
Author

Hi Oli,

Thanks for confirming. I had a feeling, but this was the code i was most likely to have broken!

I'll have to look elsewhere in my code for the problem. One upside is that the corrupt display data at least fits the full 256 pixel width, unlike the non-corrupted 240 pixels! Progress! lol

Neither strings or bitmaps show up, as previously. Limitation of the platform, perhaps, despite compiling?

-Grant

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SSD1322 in 16-bit mode with AVR HW SPI? #1644

Grantiscool Oct 19, 2021

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