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The primary purpose of the Rust code generation is to emulate real ASICs. To that end, when a table size property is provided, the underlying table that gets generated in Rust code should behave like the target ASIC does when size number of entries is reached.
The P4 spec is vague on what the semantics of table sizes are. From the P4 spec section 14.2.1.5 we have
If a table has a size value specified for it with value N, it is recommended that a compiler should choose a data plane implementation that is capable of storing N table entries. This does not guarantee that an arbitrary set of N entries can always be inserted in such a table, only that there is some set of N entries that can be inserted.
So there is no prescribed behavior here. We should probably have code generation options that can capture what the target ASIC being emulated does.
The text was updated successfully, but these errors were encountered:
The primary purpose of the Rust code generation is to emulate real ASICs. To that end, when a table
size
property is provided, the underlying table that gets generated in Rust code should behave like the target ASIC does whensize
number of entries is reached.The P4 spec is vague on what the semantics of table sizes are. From the P4 spec section 14.2.1.5 we have
So there is no prescribed behavior here. We should probably have code generation options that can capture what the target ASIC being emulated does.
The text was updated successfully, but these errors were encountered: