diff --git a/DAC/DAC.c b/DAC/DAC.c new file mode 100644 index 0000000..c601104 --- /dev/null +++ b/DAC/DAC.c @@ -0,0 +1,27 @@ +// DAC.c +// Runs on LM4F120 or TM4C123, +// edX lab 13 +// Implementation of the 4-bit digital to analog converter +// Daniel Valvano, Jonathan Valvano +// March 13, 2014 +// Port B bits 3-0 have the 4-bit DAC + +#include "DAC.h" +#include "..//tm4c123gh6pm.h" + +// **************DAC_Init********************* +// Initialize 4-bit DAC +// Input: none +// Output: none +void DAC_Init(void){ + +} + + +// **************DAC_Out********************* +// output to DAC +// Input: 4-bit data, 0 to 15 +// Output: none +void DAC_Out(unsigned long data){ + +} diff --git a/DAC/DAC.h b/DAC/DAC.h new file mode 100644 index 0000000..0449e32 --- /dev/null +++ b/DAC/DAC.h @@ -0,0 +1,22 @@ +// DAC.h +// Runs on LM4F120 or TM4C123, +// edX lab 13 +// Header file for the 4-bit digital to analog converter +// Daniel Valvano, Jonathan Valvano +// March 13, 2014 + +// **************DAC_Init********************* +// Initialize 4-bit DAC +// Input: none +// Output: none +void DAC_Init(void); + + +// **************DAC_Out********************* +// output to DAC +// Input: 4-bit data, 0 to 15 +// Output: none +void DAC_Out(unsigned long data); + + + diff --git a/DAC/DACdata.pdf b/DAC/DACdata.pdf new file mode 100644 index 0000000..bc0a1d6 Binary files /dev/null and b/DAC/DACdata.pdf differ diff --git a/DAC/DACdata.xls b/DAC/DACdata.xls new file mode 100644 index 0000000..029d3d1 Binary files /dev/null and b/DAC/DACdata.xls differ diff --git a/DAC/ExtDll.iex b/DAC/ExtDll.iex new file mode 100644 index 0000000..6c0896e --- /dev/null +++ b/DAC/ExtDll.iex @@ -0,0 +1,2 @@ +[EXTDLL] +Count=0 diff --git a/DAC/Lab13.c b/DAC/Lab13.c new file mode 100644 index 0000000..d29026a --- /dev/null +++ b/DAC/Lab13.c @@ -0,0 +1,47 @@ +// Lab13.c +// Runs on LM4F120 or TM4C123 +// Use SysTick interrupts to implement a 4-key digital piano +// edX Lab 13 +// Daniel Valvano, Jonathan Valvano +// March 13, 2014 +// Port B bits 3-0 have the 4-bit DAC +// Port E bits 3-0 have 4 piano keys + +#include "..//tm4c123gh6pm.h" +#include "Sound.h" +#include "Piano.h" +#include "TExaS.h" + +// basic functions defined at end of startup.s +void DisableInterrupts(void); // Disable interrupts +void EnableInterrupts(void); // Enable interrupts +void delay(unsigned long msec); +int main(void){ // Real Lab13 + // for the real board grader to work + // you must connect PD3 to your DAC output + TExaS_Init(SW_PIN_PE3210, DAC_PIN_PB3210,ScopeOn); // activate grader and set system clock to 80 MHz +// PortE used for piano keys, PortB used for DAC + Sound_Init(); // initialize SysTick timer and DAC + Piano_Init(); + EnableInterrupts(); // enable after all initialization are done + while(1){ +// input from keys to select tone + + } + +} + +// Inputs: Number of msec to delay +// Outputs: None +void delay(unsigned long msec){ + unsigned long count; + while(msec > 0 ) { // repeat while there are still delay + count = 16000; // about 1ms + while (count > 0) { + count--; + } // This while loop takes approximately 3 cycles + msec--; + } +} + + diff --git a/DAC/Piano.c b/DAC/Piano.c new file mode 100644 index 0000000..37083d4 --- /dev/null +++ b/DAC/Piano.c @@ -0,0 +1,30 @@ +// Piano.c +// Runs on LM4F120 or TM4C123, +// edX lab 13 +// There are four keys in the piano +// Daniel Valvano +// September 30, 2013 + +// Port E bits 3-0 have 4 piano keys + +#include "Piano.h" +#include "..//tm4c123gh6pm.h" + + +// **************Piano_Init********************* +// Initialize piano key inputs +// Input: none +// Output: none +void Piano_Init(void){ + +} +// **************Piano_In********************* +// Input from piano key inputs +// Input: none +// Output: 0 to 15 depending on keys +// 0x01 is key 0 pressed, 0x02 is key 1 pressed, +// 0x04 is key 2 pressed, 0x08 is key 3 pressed +unsigned long Piano_In(void){ + + return 0; // remove this, replace with input +} diff --git a/DAC/Piano.h b/DAC/Piano.h new file mode 100644 index 0000000..5f0106a --- /dev/null +++ b/DAC/Piano.h @@ -0,0 +1,21 @@ +// Piano.h +// Runs on LM4F120 or TM4C123, +// edX lab 13 +// There are four keys in the piano +// Daniel Valvano, Jonathan Valvano +// March 13, 2014 + +// **************Piano_Init********************* +// Initialize piano key inputs +// Input: none +// Output: none +void Piano_Init(void); + + +// **************Piano_In********************* +// Input from piano key inputs +// Input: none +// Output: 0 to 15 depending on keys +// 0x01 is key 0 pressed, 0x02 is key 1 pressed, +// 0x04 is key 2 pressed, 0x08 is key 3 pressed +unsigned long Piano_In(void); diff --git a/DAC/Sound.c b/DAC/Sound.c new file mode 100644 index 0000000..6168adb --- /dev/null +++ b/DAC/Sound.c @@ -0,0 +1,46 @@ +// Sound.c +// Runs on LM4F120 or TM4C123, +// edX lab 13 +// Use the SysTick timer to request interrupts at a particular period. +// Daniel Valvano, Jonathan Valvano +// March 13, 2014 +// This routine calls the 4-bit DAC + +#include "Sound.h" +#include "DAC.h" +#include "..//tm4c123gh6pm.h" + +// **************Sound_Init********************* +// Initialize Systick periodic interrupts +// Also calls DAC_Init() to initialize DAC +// Input: none +// Output: none +void Sound_Init(void){ + +} + +// **************Sound_Tone********************* +// Change Systick periodic interrupts to start sound output +// Input: interrupt period +// Units of period are 12.5ns +// Maximum is 2^24-1 +// Minimum is determined by length of ISR +// Output: none +void Sound_Tone(unsigned long period){ +// this routine sets the RELOAD and starts SysTick +} + + +// **************Sound_Off********************* +// stop outputing to DAC +// Output: none +void Sound_Off(void){ + // this routine stops the sound output +} + + +// Interrupt service routine +// Executed every 12.5ns*(period) +void SysTick_Handler(void){ + +} diff --git a/DAC/Sound.h b/DAC/Sound.h new file mode 100644 index 0000000..7ae0b55 --- /dev/null +++ b/DAC/Sound.h @@ -0,0 +1,29 @@ +// Sound.h +// Runs on LM4F120 or TM4C123, +// edX lab 13 +// Use the SysTick timer to request interrupts at a particular period. +// Daniel Valvano, Jonathan Valvano +// March 13, 2014 + +// **************Sound_Init********************* +// Initialize Systick periodic interrupts +// Also initializes DAC +// Input: none +// Output: none +void Sound_Init(void); + +// **************Sound_Tone********************* +// Change SysTick periodic interrupts to start sound output +// Input: interrupt period +// Units of period are 12.5ns +// Maximum is 2^24-1 +// Minimum is determined by length of ISR +// Output: none +void Sound_Tone(unsigned long period); + + +// **************Sound_Off********************* +// stop outputing to DAC +// Output: none +void Sound_Off(void); + diff --git a/DAC/TExaS.h b/DAC/TExaS.h new file mode 100644 index 0000000..5654822 --- /dev/null +++ b/DAC/TExaS.h @@ -0,0 +1,56 @@ +// TExaS.h +// Runs on LM4F120/TM4C123 +// Periodic timer Timer4A, ADC1, PD3, and UART0 used to create the scope +// Periodic timer Timer5A which will interact with debugger and grade the lab +// It initializes on reset and runs whenever interrupts are enabled +// Jonathan Valvano +// March 4, 2014 + +/* This example accompanies the book + "Embedded Systems: Real Time Operating Systems for ARM Cortex M Microcontrollers", + ISBN: 978-1466468863, Jonathan Valvano, copyright (c) 2013 + Section 6.4.5, Program 6.1 + + Copyright 2013 by Jonathan W. Valvano, valvano@mail.utexas.edu + You may use, edit, run or distribute this file + as long as the above copyright notice remains + THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, + OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + For more information about my classes, my research, and my books, see + http://users.ece.utexas.edu/~valvano/ + */ + +// IMPORTANT: These enumerated types are specific to Lab 13. +enum InputPorts{ + SW_PIN_PA5432 = 0, + SW_PIN_PB3210 = 1, + SW_PIN_PE3210 = 4 +}; + +enum OutputPorts{ + DAC_PIN_PA5432 = 0, // optionally, you can use PA7-2, but the top two bits are not graded + DAC_PIN_PB3210 = 1, // optionally, you can use PB5-0, but the top two bits are not graded + DAC_PIN_PE3210 = 4 // optionally, you can use PE5-0, but the top two bits are not graded +}; + +enum ScopeModes{ + ScopeOff = 0, // no scope needed + ScopeOn = 1 // turn on UART0 and stream analog data from PD3 to TExaSdisplay +}; +// ************TExaS_Init***************** +// Initialize grader, triggered by timer 5A +// This needs to be called once +// Inputs: iport input(s) connected to this port +// oport output(s) connected to this port +// scope true if oscilloscope to be implemented (uses UART0 and TExaSdisplay) +// Outputs: none +void TExaS_Init(enum InputPorts iport, enum OutputPorts oport, enum ScopeModes scope); + +// ************TExaS_Stop***************** +// Stop the transfer +// Inputs: none +// Outputs: none +void TExaS_Stop(void); diff --git a/DAC/dac.pdf b/DAC/dac.pdf new file mode 100644 index 0000000..21b3a7f Binary files /dev/null and b/DAC/dac.pdf differ diff --git a/DAC/dac.xls b/DAC/dac.xls new file mode 100644 index 0000000..36095e7 Binary files /dev/null and b/DAC/dac.xls differ diff --git a/DAC/dac_Guitar.xls b/DAC/dac_Guitar.xls new file mode 100644 index 0000000..b8ded3e Binary files /dev/null and b/DAC/dac_Guitar.xls differ diff --git a/DAC/dac_basson.xls b/DAC/dac_basson.xls new file mode 100644 index 0000000..15a5973 Binary files /dev/null and b/DAC/dac_basson.xls differ diff --git a/DAC/dac_flute.xls b/DAC/dac_flute.xls new file mode 100644 index 0000000..f7e9bbc Binary files /dev/null and b/DAC/dac_flute.xls differ diff --git a/DAC/dac_horn.xls b/DAC/dac_horn.xls new file mode 100644 index 0000000..3a07f78 Binary files /dev/null and b/DAC/dac_horn.xls differ diff --git a/DAC/dac_trumpet.xls b/DAC/dac_trumpet.xls new file mode 100644 index 0000000..8c5374d Binary files /dev/null and b/DAC/dac_trumpet.xls differ diff --git a/DAC/startup.s b/DAC/startup.s new file mode 100644 index 0000000..b218cf2 --- /dev/null +++ b/DAC/startup.s @@ -0,0 +1,674 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** +; Edited to conform with ISR names as described in +; "Embedded Systems: Introduction to ARM Cortex M Microcontrollers", +; ISBN: 978-1469998749, Jonathan Valvano, copyright (c) 2012 +; "Embedded Systems: Real Time Interfacing to ARM Cortex M Microcontrollers", +; ISBN: 978-1463590154, Jonathan Valvano, copyright (c) 2012 +; "Embedded Systems: Real-Time Operating Systems for ARM Cortex M Microcontrollers", +; ISBN: 978-1466468863, Jonathan Valvano, copyright (c) 2013 +; +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000400 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + DCD GPIOPortA_Handler ; GPIO Port A + DCD GPIOPortB_Handler ; GPIO Port B + DCD GPIOPortC_Handler ; GPIO Port C + DCD GPIOPortD_Handler ; GPIO Port D + DCD GPIOPortE_Handler ; GPIO Port E + DCD UART0_Handler ; UART0 Rx and Tx + DCD UART1_Handler ; UART1 Rx and Tx + DCD SSI0_Handler ; SSI0 Rx and Tx + DCD I2C0_Handler ; I2C0 Master and Slave + DCD PWM0Fault_Handler ; PWM 0 Fault + DCD PWM0Generator0_Handler ; PWM 0 Generator 0 + DCD PWM0Generator1_Handler ; PWM 0 Generator 1 + DCD PWM0Generator2_Handler ; PWM 0 Generator 2 + DCD Quadrature0_Handler ; Quadrature Encoder 0 + DCD ADC0Seq0_Handler ; ADC0 Sequence 0 + DCD ADC0Seq1_Handler ; ADC0 Sequence 1 + DCD ADC0Seq2_Handler ; ADC0 Sequence 2 + DCD ADC0Seq3_Handler ; ADC0 Sequence 3 + DCD WDT_Handler ; Watchdog + DCD Timer0A_Handler ; Timer 0 subtimer A + DCD Timer0B_Handler ; Timer 0 subtimer B + DCD Timer1A_Handler ; Timer 1 subtimer A + DCD Timer1B_Handler ; Timer 1 subtimer B + DCD Timer2A_Handler ; Timer 2 subtimer A + DCD Timer2B_Handler ; Timer 2 subtimer B + DCD Comp0_Handler ; Analog Comp 0 + DCD Comp1_Handler ; Analog Comp 1 + DCD Comp2_Handler ; Analog Comp 2 + DCD SysCtl_Handler ; System Control + DCD FlashCtl_Handler ; Flash Control + DCD GPIOPortF_Handler ; GPIO Port F + DCD GPIOPortG_Handler ; GPIO Port G + DCD GPIOPortH_Handler ; GPIO Port H + DCD UART2_Handler ; UART2 Rx and Tx + DCD SSI1_Handler ; SSI1 Rx and Tx + DCD Timer3A_Handler ; Timer 3 subtimer A + DCD Timer3B_Handler ; Timer 3 subtimer B + DCD I2C1_Handler ; I2C1 Master and Slave + DCD Quadrature1_Handler ; Quadrature Encoder 1 + DCD CAN0_Handler ; CAN0 + DCD CAN1_Handler ; CAN1 + DCD CAN2_Handler ; CAN2 + DCD Ethernet_Handler ; Ethernet + DCD Hibernate_Handler ; Hibernate + DCD USB0_Handler ; USB0 + DCD PWM0Generator3_Handler ; PWM 0 Generator 3 + DCD uDMA_Handler ; uDMA Software Transfer 46 + DCD uDMA_Error ; uDMA Error + DCD ADC1Seq0_Handler ; ADC1 Sequence 0, NVIC_PRI12_R + DCD ADC1Seq1_Handler ; ADC1 Sequence 1 + DCD ADC1Seq2_Handler ; ADC1 Sequence 2, 50 + DCD ADC1Seq3_Handler ; ADC1 Sequence 3 + DCD I2S0_Handler ; I2S0, NVIC_PRI13_R + DCD ExtBus_Handler ; External Bus Interface 0 + DCD GPIOPortJ_Handler ; GPIO Port J + DCD GPIOPortK_Handler ; GPIO Port K + DCD GPIOPortL_Handler ; GPIO Port L, NVIC_PRI14_R + DCD SSI2_Handler ; SSI2 Rx and Tx + DCD SSI3_Handler ; SSI3 Rx and Tx + DCD UART3_Handler ; UART3 Rx and Tx + DCD UART4_Handler ; UART4 Rx and Tx, 60, NVIC_PRI15_R + DCD UART5_Handler ; UART5 Rx and Tx + DCD UART6_Handler ; UART6 Rx and Tx + DCD UART7_Handler ; UART7 Rx and Tx + DCD 0 ; Reserved, NVIC_PRI16_R + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD I2C2_Handler ; I2C2 Master and Slave, NVIC_PRI17_R + DCD I2C3_Handler ; I2C3 Master and Slave + DCD Timer4A_Handler ; Timer 4 subtimer A, interrupt 70, bits23-21 + DCD Timer4B_Handler ; Timer 4 subtimer B + DCD 0 ; Reserved 72, NVIC_PRI18_R + DCD 0 ; Reserved + DCD 0 ; Reserved 74 + DCD 0 ; Reserved + DCD 0 ; Reserved 76, NVIC_PRI19_R + DCD 0 ; Reserved + DCD 0 ; Reserved 78 + DCD 0 ; Reserved + DCD 0 ; Reserved 80, NVIC_PRI20_R + DCD 0 ; Reserved + DCD 0 ; Reserved 82 + DCD 0 ; Reserved + DCD 0 ; Reserved 84, NVIC_PRI21_R + DCD 0 ; Reserved + DCD 0 ; Reserved 86 + DCD 0 ; Reserved + DCD 0 ; Reserved 88, NVIC_PRI22_R + DCD 0 ; Reserved + DCD 0 ; Reserved 90 + DCD 0 ; Reserved + DCD Timer5A_Handler ; Timer 5 subtimer A interrupt number 92 + DCD Timer5B_Handler ; Timer 5 subtimer B + DCD WideTimer0A_Handler ; Wide Timer 0 subtimer A + DCD WideTimer0B_Handler ; Wide Timer 0 subtimer B + DCD WideTimer1A_Handler ; Wide Timer 1 subtimer A + DCD WideTimer1B_Handler ; Wide Timer 1 subtimer B + DCD WideTimer2A_Handler ; Wide Timer 2 subtimer A + DCD WideTimer2B_Handler ; Wide Timer 2 subtimer B + DCD WideTimer3A_Handler ; Wide Timer 3 subtimer A + DCD WideTimer3B_Handler ; Wide Timer 3 subtimer B + DCD WideTimer4A_Handler ; Wide Timer 4 subtimer A + DCD WideTimer4B_Handler ; Wide Timer 4 subtimer B + DCD WideTimer5A_Handler ; Wide Timer 5 subtimer A + DCD WideTimer5B_Handler ; Wide Timer 5 subtimer B + DCD FPU_Handler ; FPU + DCD PECI0_Handler ; PECI 0 + DCD LPC0_Handler ; LPC 0 + DCD I2C4_Handler ; I2C4 Master and Slave + DCD I2C5_Handler ; I2C5 Master and Slave + DCD GPIOPortM_Handler ; GPIO Port M + DCD GPIOPortN_Handler ; GPIO Port N + DCD Quadrature2_Handler ; Quadrature Encoder 2 + DCD Fan0_Handler ; Fan 0 + DCD 0 ; Reserved + DCD GPIOPortP_Handler ; GPIO Port P (Summary or P0) + DCD GPIOPortP1_Handler ; GPIO Port P1 + DCD GPIOPortP2_Handler ; GPIO Port P2 + DCD GPIOPortP3_Handler ; GPIO Port P3 + DCD GPIOPortP4_Handler ; GPIO Port P4 + DCD GPIOPortP5_Handler ; GPIO Port P5 + DCD GPIOPortP6_Handler ; GPIO Port P6 + DCD GPIOPortP7_Handler ; GPIO Port P7 + DCD GPIOPortQ_Handler ; GPIO Port Q (Summary or Q0) + DCD GPIOPortQ1_Handler ; GPIO Port Q1 + DCD GPIOPortQ2_Handler ; GPIO Port Q2 + DCD GPIOPortQ3_Handler ; GPIO Port Q3 + DCD GPIOPortQ4_Handler ; GPIO Port Q4 + DCD GPIOPortQ5_Handler ; GPIO Port Q5 + DCD GPIOPortQ6_Handler ; GPIO Port Q6 + DCD GPIOPortQ7_Handler ; GPIO Port Q7 + DCD GPIOPortR_Handler ; GPIO Port R + DCD GPIOPortS_Handler ; GPIO Port S + DCD PWM1Generator0_Handler ; PWM 1 Generator 0 + DCD PWM1Generator1_Handler ; PWM 1 Generator 1 + DCD PWM1Generator2_Handler ; PWM 1 Generator 2 + DCD PWM1Generator3_Handler ; PWM 1 Generator 3 + DCD PWM1Fault_Handler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; DO NOT enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; +; MOVW R0, #0xED88 +; MOVT R0, #0xE000 +; LDR R1, [R0] +; ORR R1, #0x00F00000 +; STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP + +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP +IntDefaultHandler\ + PROC + + EXPORT GPIOPortA_Handler [WEAK] + EXPORT GPIOPortB_Handler [WEAK] + EXPORT GPIOPortC_Handler [WEAK] + EXPORT GPIOPortD_Handler [WEAK] + EXPORT GPIOPortE_Handler [WEAK] + EXPORT UART0_Handler [WEAK] + EXPORT UART1_Handler [WEAK] + EXPORT SSI0_Handler [WEAK] + EXPORT I2C0_Handler [WEAK] + EXPORT PWM0Fault_Handler [WEAK] + EXPORT PWM0Generator0_Handler [WEAK] + EXPORT PWM0Generator1_Handler [WEAK] + EXPORT PWM0Generator2_Handler [WEAK] + EXPORT Quadrature0_Handler [WEAK] + EXPORT ADC0Seq0_Handler [WEAK] + EXPORT ADC0Seq1_Handler [WEAK] + EXPORT ADC0Seq2_Handler [WEAK] + EXPORT ADC0Seq3_Handler [WEAK] + EXPORT WDT_Handler [WEAK] + EXPORT Timer0A_Handler [WEAK] + EXPORT Timer0B_Handler [WEAK] + EXPORT Timer1A_Handler [WEAK] + EXPORT Timer1B_Handler [WEAK] + EXPORT Timer2A_Handler [WEAK] + EXPORT Timer2B_Handler [WEAK] + EXPORT Comp0_Handler [WEAK] + EXPORT Comp1_Handler [WEAK] + EXPORT Comp2_Handler [WEAK] + EXPORT SysCtl_Handler [WEAK] + EXPORT FlashCtl_Handler [WEAK] + EXPORT GPIOPortF_Handler [WEAK] + EXPORT GPIOPortG_Handler [WEAK] + EXPORT GPIOPortH_Handler [WEAK] + EXPORT UART2_Handler [WEAK] + EXPORT SSI1_Handler [WEAK] + EXPORT Timer3A_Handler [WEAK] + EXPORT Timer3B_Handler [WEAK] + EXPORT I2C1_Handler [WEAK] + EXPORT Quadrature1_Handler [WEAK] + EXPORT CAN0_Handler [WEAK] + EXPORT CAN1_Handler [WEAK] + EXPORT CAN2_Handler [WEAK] + EXPORT Ethernet_Handler [WEAK] + EXPORT Hibernate_Handler [WEAK] + EXPORT USB0_Handler [WEAK] + EXPORT PWM0Generator3_Handler [WEAK] + EXPORT uDMA_Handler [WEAK] + EXPORT uDMA_Error [WEAK] + EXPORT ADC1Seq0_Handler [WEAK] + EXPORT ADC1Seq1_Handler [WEAK] + EXPORT ADC1Seq2_Handler [WEAK] + EXPORT ADC1Seq3_Handler [WEAK] + EXPORT I2S0_Handler [WEAK] + EXPORT ExtBus_Handler [WEAK] + EXPORT GPIOPortJ_Handler [WEAK] + EXPORT GPIOPortK_Handler [WEAK] + EXPORT GPIOPortL_Handler [WEAK] + EXPORT SSI2_Handler [WEAK] + EXPORT SSI3_Handler [WEAK] + EXPORT UART3_Handler [WEAK] + EXPORT UART4_Handler [WEAK] + EXPORT UART5_Handler [WEAK] + EXPORT UART6_Handler [WEAK] + EXPORT UART7_Handler [WEAK] + EXPORT I2C2_Handler [WEAK] + EXPORT I2C3_Handler [WEAK] + EXPORT Timer4A_Handler [WEAK] + EXPORT Timer4B_Handler [WEAK] + EXPORT Timer5A_Handler [WEAK] + EXPORT Timer5B_Handler [WEAK] + EXPORT WideTimer0A_Handler [WEAK] + EXPORT WideTimer0B_Handler [WEAK] + EXPORT WideTimer1A_Handler [WEAK] + EXPORT WideTimer1B_Handler [WEAK] + EXPORT WideTimer2A_Handler [WEAK] + EXPORT WideTimer2B_Handler [WEAK] + EXPORT WideTimer3A_Handler [WEAK] + EXPORT WideTimer3B_Handler [WEAK] + EXPORT WideTimer4A_Handler [WEAK] + EXPORT WideTimer4B_Handler [WEAK] + EXPORT WideTimer5A_Handler [WEAK] + EXPORT WideTimer5B_Handler [WEAK] + EXPORT FPU_Handler [WEAK] + EXPORT PECI0_Handler [WEAK] + EXPORT LPC0_Handler [WEAK] + EXPORT I2C4_Handler [WEAK] + EXPORT I2C5_Handler [WEAK] + EXPORT GPIOPortM_Handler [WEAK] + EXPORT GPIOPortN_Handler [WEAK] + EXPORT Quadrature2_Handler [WEAK] + EXPORT Fan0_Handler [WEAK] + EXPORT GPIOPortP_Handler [WEAK] + EXPORT GPIOPortP1_Handler [WEAK] + EXPORT GPIOPortP2_Handler [WEAK] + EXPORT GPIOPortP3_Handler [WEAK] + EXPORT GPIOPortP4_Handler [WEAK] + EXPORT GPIOPortP5_Handler [WEAK] + EXPORT GPIOPortP6_Handler [WEAK] + EXPORT GPIOPortP7_Handler [WEAK] + EXPORT GPIOPortQ_Handler [WEAK] + EXPORT GPIOPortQ1_Handler [WEAK] + EXPORT GPIOPortQ2_Handler [WEAK] + EXPORT GPIOPortQ3_Handler [WEAK] + EXPORT GPIOPortQ4_Handler [WEAK] + EXPORT GPIOPortQ5_Handler [WEAK] + EXPORT GPIOPortQ6_Handler [WEAK] + EXPORT GPIOPortQ7_Handler [WEAK] + EXPORT GPIOPortR_Handler [WEAK] + EXPORT GPIOPortS_Handler [WEAK] + EXPORT PWM1Generator0_Handler [WEAK] + EXPORT PWM1Generator1_Handler [WEAK] + EXPORT PWM1Generator2_Handler [WEAK] + EXPORT PWM1Generator3_Handler [WEAK] + EXPORT PWM1Fault_Handler [WEAK] + +GPIOPortA_Handler +GPIOPortB_Handler +GPIOPortC_Handler +GPIOPortD_Handler +GPIOPortE_Handler +UART0_Handler +UART1_Handler +SSI0_Handler +I2C0_Handler +PWM0Fault_Handler +PWM0Generator0_Handler +PWM0Generator1_Handler +PWM0Generator2_Handler +Quadrature0_Handler +ADC0Seq0_Handler +ADC0Seq1_Handler +ADC0Seq2_Handler +ADC0Seq3_Handler +WDT_Handler +Timer0A_Handler +Timer0B_Handler +Timer1A_Handler +Timer1B_Handler +Timer2A_Handler +Timer2B_Handler +Comp0_Handler +Comp1_Handler +Comp2_Handler +SysCtl_Handler +FlashCtl_Handler +GPIOPortF_Handler +GPIOPortG_Handler +GPIOPortH_Handler +UART2_Handler +SSI1_Handler +Timer3A_Handler +Timer3B_Handler +I2C1_Handler +Quadrature1_Handler +CAN0_Handler +CAN1_Handler +CAN2_Handler +Ethernet_Handler +Hibernate_Handler +USB0_Handler +PWM0Generator3_Handler +uDMA_Handler +uDMA_Error +ADC1Seq0_Handler +ADC1Seq1_Handler +ADC1Seq2_Handler +ADC1Seq3_Handler +I2S0_Handler +ExtBus_Handler +GPIOPortJ_Handler +GPIOPortK_Handler +GPIOPortL_Handler +SSI2_Handler +SSI3_Handler +UART3_Handler +UART4_Handler +UART5_Handler +UART6_Handler +UART7_Handler +I2C2_Handler +I2C3_Handler +Timer4A_Handler +Timer4B_Handler +Timer5A_Handler +Timer5B_Handler +WideTimer0A_Handler +WideTimer0B_Handler +WideTimer1A_Handler +WideTimer1B_Handler +WideTimer2A_Handler +WideTimer2B_Handler +WideTimer3A_Handler +WideTimer3B_Handler +WideTimer4A_Handler +WideTimer4B_Handler +WideTimer5A_Handler +WideTimer5B_Handler +FPU_Handler +PECI0_Handler +LPC0_Handler +I2C4_Handler +I2C5_Handler +GPIOPortM_Handler +GPIOPortN_Handler +Quadrature2_Handler +Fan0_Handler +GPIOPortP_Handler +GPIOPortP1_Handler +GPIOPortP2_Handler +GPIOPortP3_Handler +GPIOPortP4_Handler +GPIOPortP5_Handler +GPIOPortP6_Handler +GPIOPortP7_Handler +GPIOPortQ_Handler +GPIOPortQ1_Handler +GPIOPortQ2_Handler +GPIOPortQ3_Handler +GPIOPortQ4_Handler +GPIOPortQ5_Handler +GPIOPortQ6_Handler +GPIOPortQ7_Handler +GPIOPortR_Handler +GPIOPortS_Handler +PWM1Generator0_Handler +PWM1Generator1_Handler +PWM1Generator2_Handler +PWM1Generator3_Handler +PWM1Fault_Handler + + B . + + ENDP + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; Useful functions. +; +;****************************************************************************** + EXPORT DisableInterrupts + EXPORT EnableInterrupts + EXPORT StartCritical + EXPORT EndCritical + EXPORT WaitForInterrupt + +;*********** DisableInterrupts *************** +; disable interrupts +; inputs: none +; outputs: none +DisableInterrupts + CPSID I + BX LR + +;*********** EnableInterrupts *************** +; disable interrupts +; inputs: none +; outputs: none +EnableInterrupts + CPSIE I + BX LR + +;*********** StartCritical ************************ +; make a copy of previous I bit, disable interrupts +; inputs: none +; outputs: previous I bit +StartCritical + MRS R0, PRIMASK ; save old status + CPSID I ; mask all (except faults) + BX LR + +;*********** EndCritical ************************ +; using the copy of previous I bit, restore I bit to previous value +; inputs: previous I bit +; outputs: none +EndCritical + MSR PRIMASK, R0 + BX LR + +;*********** WaitForInterrupt ************************ +; go to low power mode while waiting for the next interrupt +; inputs: none +; outputs: none +WaitForInterrupt + WFI + BX LR + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END