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parser.c
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/****************************************************************************
*
* Open Watcom Project
*
* Portions Copyright (c) 1983-2002 Sybase, Inc. All Rights Reserved.
*
* ========================================================================
*
* This file contains Original Code and/or Modifications of Original
* Code as defined in and that are subject to the Sybase Open Watcom
* Public License version 1.0 (the 'License'). You may not use this file
* except in compliance with the License. BY USING THIS FILE YOU AGREE TO
* ALL TERMS AND CONDITIONS OF THE LICENSE. A copy of the License is
* provided with the Original Code and Modifications, and is also
* available at www.sybase.com/developer/opensource.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND SYBASE AND ALL CONTRIBUTORS HEREBY DISCLAIM
* ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR
* NON-INFRINGEMENT. Please see the License for the specific language
* governing rights and limitations under the License.
*
* ========================================================================
*
* Description: Parser
*
****************************************************************************/
#include <ctype.h>
#include <limits.h>
#include "globals.h"
#include "memalloc.h"
#include "parser.h"
#include "preproc.h"
#include "reswords.h"
#include "codegen.h"
#include "expreval.h"
#include "fixup.h"
#include "types.h"
#include "label.h"
#include "segment.h"
#include "assume.h"
#include "proc.h"
#include "myassert.h"
#include "input.h"
#include "tokenize.h"
#include "listing.h"
#include "data.h"
#include "fastpass.h"
#include "omf.h"
#include "omfspec.h"
#include "condasm.h"
#include "extern.h"
#include "atofloat.h"
#define ADDRSIZE( s, x ) ( ( ( x ) ^ ( s ) ) ? TRUE : FALSE )
#define IS_ADDR32( s ) ( s->Ofssize ? ( s->prefix.adrsiz == FALSE ) : ( s->prefix.adrsiz == TRUE ))
#define OPSIZE32( s ) ( ( s->Ofssize ) ? FALSE : TRUE )
#define OPSIZE16( s ) ( ( s->Ofssize ) ? TRUE : FALSE )
#define InWordRange( val ) ( (val > 65535 || val < -65535) ? FALSE : TRUE )
extern ret_code (* const directive_tab[])( int, struct asm_tok[] );
/* parsing of branch instructions with imm operand is found in branch.c */
extern ret_code process_branch( struct code_info *, unsigned, const struct expr * );
extern enum proc_status ProcStatus;
//extern struct asym symPC; /* '$' symbol */
extern const int_64 maxintvalues[];
extern const int_64 minintvalues[];
extern const struct opnd_class opnd_clstab[];
#if AVXSUPP
extern const uint_8 vex_flags[];
#endif
extern int_8 Frame_Type; /* Frame of current fixup */
extern uint_16 Frame_Datum; /* Frame datum of current fixup */
struct asym *SegOverride;
static enum assume_segreg LastRegOverride;/* needed for CMPS */
/* linked lists of: index
*--------------------------------
* - undefined symbols TAB_UNDEF
* - externals TAB_EXT
* - segments TAB_SEG
* - groups TAB_GRP
* - procedures TAB_PROC
* - aliases TAB_ALIAS
*/
struct symbol_queue SymTables[TAB_LAST];
/* add item to linked list of symbols */
void sym_add_table( struct symbol_queue *queue, struct dsym *item )
/*****************************************************************/
{
#ifdef DEBUG_OUT
if ( queue == &SymTables[TAB_UNDEF] )
item->sym.fwdref = TRUE;
#endif
if( queue->head == NULL ) {
queue->head = queue->tail = item;
item->next = item->prev = NULL;
} else {
item->prev = queue->tail;
queue->tail->next = item;
queue->tail = item;
item->next = NULL;
}
}
/* remove an item from a symbol queue.
* this is called only for TAB_UNDEF and TAB_EXT,
* segments, groups, procs or aliases never change their state.
*/
void sym_remove_table( struct symbol_queue *queue, struct dsym *item )
/********************************************************************/
{
/* unlink the node */
if( item->prev )
item->prev->next = item->next;
if( item->next )
item->next->prev = item->prev;
//if ( dir->next == NULL )
// dir->next = dir->prev;
if ( queue->head == item )
queue->head = item->next;
if ( queue->tail == item )
queue->tail = item->prev;
item->next = NULL;
item->prev = NULL;
}
void sym_ext2int( struct asym *sym )
/**********************************/
/* Change symbol state from SYM_EXTERNAL to SYM_INTERNAL.
* called by:
* - CreateConstant() EXTERNDEF name:ABS -> constant
* - CreateAssemblyTimeVariable() EXTERNDEF name:ABS -> assembly-time variable
* - CreateLabel() EXTERNDEF name:NEAR|FAR|PROC -> code label
* - data_dir() EXTERNDEF name:typed memref -> data label
* - ProcDir() PROTO or EXTERNDEF name:NEAR|FAR|PROC -> PROC
*/
{
/* v2.07: GlobalQueue has been removed */
if ( sym->isproc == FALSE && sym->ispublic == FALSE ) {
sym->ispublic = TRUE;
AddPublicData( sym );
}
sym_remove_table( &SymTables[TAB_EXT], (struct dsym *)sym );
if ( sym->isproc == FALSE ) /* v2.01: don't clear flags for PROTO */
sym->first_size = 0;
sym->state = SYM_INTERNAL;
}
ret_code GetLangType( int *i, struct asm_tok tokenarray[], enum lang_type *plang )
/********************************************************************************/
{
if( tokenarray[*i].token == T_RES_ID ) {
#if 1 /* v2.03: simplified */
if ( tokenarray[(*i)].tokval >= T_C &&
tokenarray[(*i)].tokval <= T_FASTCALL ) {
*plang = tokenarray[(*i)].bytval;
(*i)++;
return( NOT_ERROR );
}
#else
switch( tokenarray[(*i)].tokval ) {
case T_C: *plang = LANG_C; break;
case T_SYSCALL: *plang = LANG_SYSCALL; break;
case T_STDCALL: *plang = LANG_STDCALL; break;
case T_PASCAL: *plang = LANG_PASCAL; break;
case T_FORTRAN: *plang = LANG_FORTRAN; break;
case T_BASIC: *plang = LANG_BASIC; break;
case T_FASTCALL: *plang = LANG_FASTCALL; break;
default:
return( ERROR );
}
(*i)++;
return( NOT_ERROR );
#endif
}
return( ERROR );
}
/* get size of a register
* v2.06: rewritten, since the sflags field
* does now contain size for GPR, STx, MMX, XMM regs.
*/
int SizeFromRegister( int registertoken )
/***************************************/
{
unsigned flags;
flags = GetSflagsSp( registertoken ) & SFR_SIZMSK;
if ( flags )
return( flags );
flags = GetValueSp( registertoken );
if ( flags & OP_SR )
return( CurrWordSize );
/* CRx, DRx, TRx remaining */
#if AMD64_SUPPORT
return( ModuleInfo.Ofssize == USE64 ? 8 : 4 );
#else
return( 4 );
#endif
}
/* get size from memory type */
/* MT_PROC memtype is set ONLY in typedefs ( state=SYM_TYPE, typekind=TYPE_TYPEDEF)
* and makes the type a PROTOTYPE. Due to technical (obsolete?) restrictions the
* prototype data is stored in another symbol and is referenced in the typedef's
* target_type member.
*/
int SizeFromMemtype( enum memtype mem_type, int Ofssize, struct asym *type )
/**************************************************************************/
{
if ( ( mem_type & MT_SPECIAL) == 0 )
return ( (mem_type & MT_SIZE_MASK) + 1 );
if ( Ofssize == USE_EMPTY )
Ofssize = ModuleInfo.Ofssize;
switch ( mem_type ) {
case MT_NEAR:
DebugMsg1(("SizeFromMemtype( MT_NEAR, Ofssize=%u )=%u\n", Ofssize, 2 << Ofssize ));
return ( 2 << Ofssize );
case MT_FAR:
DebugMsg1(("SizeFromMemtype( MT_FAR, Ofssize=%u )=%u\n", Ofssize, ( 2 << Ofssize ) + 2 ));
return ( ( 2 << Ofssize ) + 2 );
case MT_PROC:
DebugMsg1(("SizeFromMemtype( MT_PROC, Ofssize=%u, type=%s )=%u\n", Ofssize, type->name, ( 2 << Ofssize ) + ( type->isfar ? 2 : 0 ) ));
/* v2.09: use type->isfar setting */
//return( ( 2 << Ofssize ) + ( ( SIZE_CODEPTR & ( 1 << ModuleInfo.model ) ) ? 2 : 0 ) );
return( ( 2 << Ofssize ) + ( type->isfar ? 2 : 0 ) );
case MT_PTR:
DebugMsg1(("SizeFromMemtype( MT_PTR, Ofssize=%u )=%u\n", Ofssize, ( 2 << Ofssize ) + ( ( SIZE_DATAPTR & ( 1 << ModuleInfo.model ) ) ? 2 : 0 ) ));
return( ( 2 << Ofssize ) + ( ( SIZE_DATAPTR & ( 1 << ModuleInfo.model ) ) ? 2 : 0 ) );
case MT_TYPE:
if ( type )
return( type->total_size );
default:
DebugMsg1(("SizeFromMemtype( memtype=%Xh, Ofssize=%u )=%u\n", mem_type, Ofssize, 0 ));
return( 0 );
}
}
/* get memory type from size */
ret_code MemtypeFromSize( int size, enum memtype *ptype )
/*******************************************************/
{
int i;
for ( i = T_BYTE; SpecialTable[i].type == RWT_STYPE; i++ ) {
if( ( SpecialTable[i].bytval & MT_SPECIAL ) == 0 ) {
/* the size is encoded 0-based in field mem_type */
if( ( ( SpecialTable[i].bytval & MT_SIZE_MASK) + 1 ) == size ) {
*ptype = SpecialTable[i].bytval;
return( NOT_ERROR );
}
}
}
return( ERROR );
}
int OperandSize( enum operand_type opnd, const struct code_info *CodeInfo )
/*************************************************************************/
{
/* v2.0: OP_M8_R8 and OP_M16_R16 have the DFT bit set! */
if( opnd == OP_NONE ) {
return( 0 );
} else if( opnd == OP_M ) {
return( SizeFromMemtype( CodeInfo->mem_type, CodeInfo->Ofssize, NULL ) );
} else if( opnd & ( OP_R8 | OP_M08 | OP_I8 ) ) {
return( 1 );
} else if( opnd & ( OP_R16 | OP_M16 | OP_I16 | OP_SR ) ) {
return( 2 );
} else if( opnd & ( OP_R32 | OP_M32 | OP_I32 ) ) {
return( 4 );
#if AMD64_SUPPORT
} else if( opnd & ( OP_R64 | OP_M64 | OP_MMX | OP_I64 ) ) {
#else
} else if( opnd & ( OP_M64 | OP_MMX ) ) {
#endif
return( 8 );
// } else if( opnd & ( OP_I | OP_I48 ) ) {
} else if( opnd & ( OP_I48 | OP_M48 ) ) {
return( 6 );
} else if( opnd & ( OP_STI | OP_M80 ) ) {
return( 10 );
} else if( opnd & ( OP_XMM | OP_M128 ) ) {
return( 16 );
#if AVXSUPP
} else if( opnd & ( OP_YMM | OP_M256 ) ) {
return( 32 );
#endif
} else if( opnd & OP_RSPEC ) {
#if AMD64_SUPPORT
return( ( CodeInfo->Ofssize == USE64 ) ? 8 : 4 );
#else
return( 4 );
#endif
}
DebugMsg1(("OperandSize: unhandled operand type %Xh!!!\n", opnd ));
return( 0 );
}
static int comp_mem16( int reg1, int reg2 )
/*****************************************/
/*
- compare and return the r/m field encoding of 16-bit address mode;
- call by set_rm_sib() only;
*/
{
switch( reg1 ) {
case T_BX:
switch( reg2 ) {
case T_SI: return( RM_BX_SI ); /* 00 */
case T_DI: return( RM_BX_DI ); /* 01 */
}
break;
case T_BP:
switch( reg2 ) {
case T_SI: return( RM_BP_SI ); /* 02 */
case T_DI: return( RM_BP_DI ); /* 03 */
}
break;
default:
return( EmitError( MULTIPLE_INDEX_REGISTERS_NOT_ALLOWED ) );
}
return( EmitError( MULTIPLE_BASE_REGISTERS_NOT_ALLOWED ) );
}
static void check_assume( struct code_info *CodeInfo, const struct asym *sym, enum assume_segreg default_reg )
/************************************************************************************************************/
/* Check if an assumed segment register is found, and
* set CodeInfo->RegOverride if necessary.
* called by seg_override().
* at least either sym or SegOverride is != NULL.
*/
{
enum assume_segreg reg;
struct asym *assume;
if( sym && sym->state == SYM_UNDEFINED )
return;
reg = GetAssume( SegOverride, sym, default_reg, &assume );
/* set global vars Frame and Frame_Datum */
DebugMsg1(("check_assume(%s): calling SetFixupFrame(%s, FALSE)\n", sym ? sym->name : "NULL", assume ? assume->name : "NULL" ));
SetFixupFrame( assume, FALSE );
if( reg == ASSUME_NOTHING ) {
if ( sym ) {
//if( sym->state != SYM_EXTERNAL && sym->state != SYM_STACK ) {
/* v1.95: condition changed. Now there's an error msg only if
* the symbol has an explicite segment.
*/
if( sym->segment != NULL ) {
DebugMsg1(("check_assume: no segment register available to access label %s\n", sym->name ));
EmitErr( CANNOT_ACCESS_LABEL_THROUGH_SEGMENT_REGISTERS, sym->name );
} else
CodeInfo->prefix.RegOverride = default_reg;
} else {
DebugMsg1(("check_assume: no segment register available to access seg-label %s\n", SegOverride->name ));
EmitErr( CANNOT_ACCESS_LABEL_THROUGH_SEGMENT_REGISTERS, SegOverride->name );
}
} else if( default_reg != EMPTY ) {
CodeInfo->prefix.RegOverride = reg;
}
}
static void seg_override( struct code_info *CodeInfo, int seg_reg, const struct asym *sym, bool direct )
/******************************************************************************************************/
/*
* called by set_rm_sib(). determine if segment override is necessary
* with the current address mode;
* - seg_reg: register index (T_DS, T_BP, T_EBP, T_BX, ... )
*/
{
enum assume_segreg default_seg;
struct asym *assume;
/* don't touch segment overrides for string instructions */
//if ( InstrTable[optable_idx[CodeInfo->token]].allowed_prefix == AP_REP ||
// InstrTable[optable_idx[CodeInfo->token]].allowed_prefix == AP_REPxx )
if ( CodeInfo->pinstr->allowed_prefix == AP_REP ||
CodeInfo->pinstr->allowed_prefix == AP_REPxx )
return;
if( CodeInfo->token == T_LEA ) {
CodeInfo->prefix.RegOverride = EMPTY; /* skip segment override */
SetFixupFrame( sym, FALSE );
return;
}
switch( seg_reg ) {
//case T_SS: /* doesn't happen */
case T_BP:
case T_EBP:
case T_ESP:
/* todo: check why cases T_RBP/T_RSP aren't needed! */
default_seg = ASSUME_SS;
break;
default:
default_seg = ASSUME_DS;
}
if( CodeInfo->prefix.RegOverride != EMPTY ) {
assume = GetOverrideAssume( CodeInfo->prefix.RegOverride );
/* assume now holds assumed SEG/GRP symbol */
if ( sym ) {
DebugMsg1(("seg_override: sym=%s\n", sym->name ));
SetFixupFrame( assume ? assume : sym, FALSE );
} else if ( direct ) {
/* no label attached (DS:[0]). No fixup is to be created! */
if ( assume ) {
DebugMsg1(("seg_override, direct addressing: prefix.adrsiz will be set, assume=%s CI->ofssize=%u\n", assume->name, CodeInfo->Ofssize ));
CodeInfo->prefix.adrsiz = ADDRSIZE( CodeInfo->Ofssize, GetSymOfssize( assume ) );
//DebugMsg1(("seg_override: CI->prefix.adrsiz=%u\n", CodeInfo->prefix.adrsiz ));
} else {
/* v2.01: if -Zm, then use current CS offset size.
* This isn't how Masm v6 does it, but it matches Masm v5.
*/
if ( ModuleInfo.m510 )
CodeInfo->prefix.adrsiz = ADDRSIZE( CodeInfo->Ofssize, ModuleInfo.Ofssize );
else
CodeInfo->prefix.adrsiz = ADDRSIZE( CodeInfo->Ofssize, ModuleInfo.defOfssize );
}
}
} else {
if ( sym || SegOverride )
check_assume( CodeInfo, sym, default_seg );
if ( sym == NULL && SegOverride ) {
CodeInfo->prefix.adrsiz = ADDRSIZE( CodeInfo->Ofssize, GetSymOfssize( SegOverride ) );
}
}
if( CodeInfo->prefix.RegOverride == default_seg ) {
CodeInfo->prefix.RegOverride = EMPTY;
}
}
/* prepare fixup creation
* called by:
* - idata_fixup()
* - process_branch() in branch.c
* - data_item() in data.c
*/
void set_frame( const struct asym *sym )
/**************************************/
{
SetFixupFrame( SegOverride ? SegOverride : sym, FALSE );
}
/* set fixup frame if OPTION OFFSET:SEGMENT is set and
* OFFSET or SEG operator was used.
* called by:
* - idata_fixup()
* - data_item()
*/
void set_frame2( const struct asym *sym )
/***************************************/
{
SetFixupFrame( SegOverride ? SegOverride : sym, TRUE );
}
static ret_code set_rm_sib( struct code_info *CodeInfo, unsigned CurrOpnd, char ss, int index, int base, const struct asym *sym )
/*******************************************************************************************************************************/
/*
* encode ModRM and SIB byte for memory addressing.
* called by memory_operand().
* in: ss = scale factor (00=1,40=2,80=4,C0=8)
* index = index register (T_DI, T_ESI, ...)
* base = base register (T_EBP, ... )
* sym = symbol (direct addressing, displacement)
* out: CodeInfo->rm_byte, CodeInfo->sib, CodeInfo->prefix.rex
*/
{
int temp;
unsigned char mod_field;
unsigned char rm_field;
unsigned char base_reg;
unsigned char idx_reg;
#if AMD64_SUPPORT
unsigned char bit3_base;
unsigned char bit3_idx;
unsigned char rex;
#endif
DebugMsg1(("set_rm_sib(scale=%u, index=%d, base=%d, sym=%s) enter [CI.adrsiz=%u]\n", 1 << (ss >> 6), index, base, sym ? sym->name : "NULL", CodeInfo->prefix.adrsiz ));
/* clear mod */
rm_field = 0;
#if AMD64_SUPPORT
bit3_base = 0;
bit3_idx = 0;
rex = 0;
#endif
if( CodeInfo->opnd[CurrOpnd].InsFixup != NULL ) { /* symbolic displacement given? */
mod_field = MOD_10;
} else if( CodeInfo->opnd[CurrOpnd].data32l == 0 ) { /* no displacement (or 0) */
mod_field = MOD_00;
} else if( ( CodeInfo->opnd[CurrOpnd].data32l > SCHAR_MAX )
|| ( CodeInfo->opnd[CurrOpnd].data32l < SCHAR_MIN ) ) {
mod_field = MOD_10; /* full size displacement */
} else {
mod_field = MOD_01; /* byte size displacement */
}
if( ( index == EMPTY ) && ( base == EMPTY ) ) {
/* direct memory.
* clear the rightmost 3 bits
*/
CodeInfo->isdirect = TRUE;
mod_field = MOD_00;
/* default is DS:[], DS: segment override is not needed */
seg_override( CodeInfo, T_DS, sym, TRUE );
DebugMsg1(( "set_rm_sib: direct addressing, CI.Ofssize=%u / adrsize=%u / data=%" I32_SPEC "X\n",
CodeInfo->Ofssize, CodeInfo->prefix.adrsiz, CodeInfo->opnd[CurrOpnd].data32l ));
//if( !IS_ADDR32( CodeInfo ) ) {
if( ( CodeInfo->Ofssize == USE16 && CodeInfo->prefix.adrsiz == 0 ) ||
( CodeInfo->Ofssize == USE32 && CodeInfo->prefix.adrsiz == 1 )) {
if( !InWordRange( CodeInfo->opnd[CurrOpnd].data32l ) ) {
/* expect 16-bit but got 32-bit address */
DebugMsg1(( "set_rm_sib: error, Ofssize=%u, adrsize=%u, data=%" I32_SPEC "X\n",
CodeInfo->Ofssize, CodeInfo->prefix.adrsiz, CodeInfo->opnd[CurrOpnd].data32l ));
return( EmitError( MAGNITUDE_OF_OFFSET_EXCEEDS_16BIT ) );
}
rm_field = RM_D16; /* D16=110b */
} else {
rm_field = RM_D32; /* D32=101b */
#if AMD64_SUPPORT
/* v2.03: the non-RIP encoding for 64bit uses a redundant SIB mode (base=none, index=none) */
/* v2.11: always use 64-bit non-RIP addressing if no fixup has been created. */
//if ( CodeInfo->Ofssize == USE64 && CodeInfo->prefix.RegOverride != EMPTY && SegOverride != &ModuleInfo.flat_grp->sym ) {
if ( CodeInfo->Ofssize == USE64 && CodeInfo->opnd[CurrOpnd].InsFixup == NULL ) {
DebugMsg1(( "set_rm_sib: 64-bit, no fixup, data64=%" I64_SPEC "X\n", CodeInfo->opnd[CurrOpnd].data64 ));
rm_field = RM_SIB;
CodeInfo->sib = 0x25; /* IIIBBB, base=101b, index=100b */
}
#endif
}
DebugMsg1(("set_rm_sib, direct, CodeInfo->prefix.adrsiz=%u\n", CodeInfo->prefix.adrsiz ));
} else if( ( index == EMPTY ) && ( base != EMPTY ) ) {
/* for SI, DI and BX: default is DS:[],
* DS: segment override is not needed
* for BP: default is SS:[], SS: segment override is not needed
*/
switch( base ) {
case T_SI:
rm_field = RM_SI; /* 4 */
break;
case T_DI:
rm_field = RM_DI; /* 5 */
break;
case T_BP:
rm_field = RM_BP; /* 6 */
if( mod_field == MOD_00 ) {
mod_field = MOD_01;
}
break;
case T_BX:
rm_field = RM_BX; /* 7 */
break;
default: /* for 386 and up */
base_reg = GetRegNo( base );
#if AMD64_SUPPORT
bit3_base = base_reg >> 3;
base_reg &= BIT_012;
#endif
rm_field = base_reg;
DebugMsg1(("set_rm_sib: base_reg is %u\n", base_reg ));
if ( base_reg == 4 ) {
/* 4 is RSP/ESP or R12/R12D, which must use SIB encoding.
* SSIIIBBB, ss = 00, index = 100b ( no index ), base = 100b ( ESP ) */
CodeInfo->sib = 0x24;
} else if ( base_reg == 5 && mod_field == MOD_00 ) {
/* 5 is [E|R]BP or R13[D]. Needs displacement */
mod_field = MOD_01;
}
#if AMD64_SUPPORT
/* v2.02 */
//rex = ( bit3_base << 2 ); /* set REX_R */
rex = bit3_base; /* set REX_R */
#endif
}
#if AMD64_SUPPORT
DebugMsg1(("set_rm_sib, indirect with base, mod_field=%X, rm_field=%X, rex=%X\n", mod_field, rm_field, rex ));
#else
DebugMsg1(("set_rm_sib, indirect with base, rm_field=%X\n", rm_field ));
#endif
seg_override( CodeInfo, base, sym, FALSE );
} else if( ( index != EMPTY ) && ( base == EMPTY ) ) {
idx_reg = GetRegNo( index );
#if AMD64_SUPPORT
bit3_idx = idx_reg >> 3;
idx_reg &= BIT_012;
#endif
/* mod field is 00 */
mod_field = MOD_00;
/* s-i-b is present ( r/m = 100b ) */
rm_field = RM_SIB;
/* scale factor, index, base ( 0x05 => no base reg ) */
CodeInfo->sib = ( ss | ( idx_reg << 3 ) | 0x05 );
#if AMD64_SUPPORT
rex = (bit3_idx << 1); /* set REX_X */
#endif
/* default is DS:[], DS: segment override is not needed */
seg_override( CodeInfo, T_DS, sym, FALSE );
} else {
/* base != EMPTY && index != EMPTY */
base_reg = GetRegNo( base );
idx_reg = GetRegNo( index );
#if AMD64_SUPPORT
bit3_base = base_reg >> 3;
bit3_idx = idx_reg >> 3;
base_reg &= BIT_012;
idx_reg &= BIT_012;
#endif
if ( ( GetSflagsSp( base ) & GetSflagsSp( index ) & SFR_SIZMSK ) == 0 ) {
return( EmitError( CANNOT_MIX_16_AND_32_BIT_REGISTERS ) );
}
switch( index ) {
case T_BX:
case T_BP:
if( ( temp = comp_mem16( index, base ) ) == ERROR )
return( ERROR );
rm_field = temp;
seg_override( CodeInfo, index, sym, FALSE );
break;
case T_SI:
case T_DI:
if( ( temp = comp_mem16( base, index ) ) == ERROR )
return( ERROR );
rm_field = temp;
seg_override( CodeInfo, base, sym, FALSE );
break;
#if AMD64_SUPPORT
case T_RSP:
#endif
case T_ESP:
//EmitErr( CANNOT_BE_USED_AS_INDEX_REGISTER, ??? );
return( EmitError( INVALID_USE_OF_REGISTER ) );
default:
if( base_reg == 5 ) { /* v2.03: EBP/RBP/R13/R13D? */
if( mod_field == MOD_00 ) {
mod_field = MOD_01;
}
}
/* s-i-b is present ( r/m = 100b ) */
rm_field |= RM_SIB;
CodeInfo->sib = ( ss | idx_reg << 3 | base_reg );
#if AMD64_SUPPORT
rex = (bit3_idx << 1) + (bit3_base); /* set REX_X + REX_B */
#endif
seg_override( CodeInfo, base, sym, FALSE );
} /* end switch(index) */
#if AMD64_SUPPORT
DebugMsg1(("set_rm_sib, indirect, base+index: mod_field=%X, rm_field=%X, rex=%X\n", mod_field, rm_field, rex ));
#else
DebugMsg1(("set_rm_sib, indirect, base+index: rm_field=%X\n", rm_field ));
#endif
}
if( CurrOpnd == OPND2 ) {
/* shift the register field to left by 3 bit */
CodeInfo->rm_byte = mod_field | ( rm_field << 3 ) | ( CodeInfo->rm_byte & BIT_012 );
#if AMD64_SUPPORT
/* v2.02: exchange B and R, keep X */
//CodeInfo->prefix.rex |= (rex >> 2 );
CodeInfo->prefix.rex |= ( ( rex >> 2 ) | ( rex & REX_X ) | (( rex & 1) << 2 ) );
#endif
} else if( CurrOpnd == OPND1 ) {
CodeInfo->rm_byte = mod_field | rm_field;
#if AMD64_SUPPORT
CodeInfo->prefix.rex |= rex;
#endif
}
return( NOT_ERROR );
}
/* override handling
* called by
* - process_branch()
* - idata_fixup()
* - memory_operand() (CodeInfo != NULL)
* - data_item()
* 1. If it's a segment register, set CodeInfo->prefix.RegOverride.
* 2. Set global variable SegOverride if it's a SEG/GRP symbol
* (or whatever is assumed for the segment register)
*/
ret_code segm_override( const struct expr *opndx, struct code_info *CodeInfo )
/****************************************************************************/
{
struct asym *sym;
if( opndx->override != NULL ) {
if( opndx->override->token == T_REG ) {
int temp = GetRegNo( opndx->override->tokval );
if ( SegAssumeTable[temp].error ) {
DebugMsg(("segm_override: assume error, reg=%u\n", temp ));
return( EmitError( USE_OF_REGISTER_ASSUMED_TO_ERROR ) );
}
#if AMD64_SUPPORT
/* ES,CS,SS and DS overrides are invalid in 64-bit */
if ( CodeInfo && CodeInfo->Ofssize == USE64 && temp < ASSUME_FS ) {
return( EmitError( ILLEGAL_USE_OF_SEGMENT_REGISTER ) );
}
#endif
sym = GetOverrideAssume( temp );
if ( CodeInfo ) {
/* hack: save the previous reg override value (needed for CMPS) */
LastRegOverride = CodeInfo->prefix.RegOverride;
CodeInfo->prefix.RegOverride = temp;
}
} else {
sym = SymSearch( opndx->override->string_ptr );
}
if ( sym && ( sym->state == SYM_GRP || sym->state == SYM_SEG ))
SegOverride = sym;
}
return( NOT_ERROR );
}
/* get an immediate operand without a fixup.
* output:
* - ERROR: error
* - NOT_ERROR: ok,
* CodeInfo->opnd_type[CurrOpnd] = OP_Ix
* CodeInfo->data[CurrOpnd] = value
* CodeInfo->prefix.opsiz
* CodeInfo->iswide
*/
static ret_code idata_nofixup( struct code_info *CodeInfo, unsigned CurrOpnd, const struct expr *opndx )
/******************************************************************************************************/
{
enum operand_type op_type;
int_32 value;
int size;
DebugMsg1(("idata_nofixup( CurrOpnd=%u ) enter [opnd kind=%u mem_type=%Xh value=%" I64_SPEC "X]\n", CurrOpnd, opndx->kind, opndx->mem_type, opndx->value64));
/* jmp/call/jxx/loop/jcxz/jecxz? */
if( IS_ANY_BRANCH( CodeInfo->token ) ) {
return( process_branch( CodeInfo, CurrOpnd, opndx ) );
}
value = opndx->value;
CodeInfo->opnd[CurrOpnd].data32l = value;
#if AMD64_SUPPORT
/* 64bit immediates are restricted to MOV <reg>,<imm64>
*/
if ( opndx->hlvalue != 0 ) { /* magnitude > 64 bits? */
DebugMsg1(("idata_nofixup: error, hlvalue=%" I64_SPEC "X\n", opndx->hlvalue ));
return( EmitConstError( opndx ) );
}
/* v2.03: handle QWORD type coercion here as well!
* This change also reveals an old problem in the expression evaluator:
* the mem_type field is set whenever a (simple) type token is found.
* It should be set ONLY when the type is used in conjuction with the
* PTR operator!
* current workaround: query the 'explicit' flag.
*/
//if ( opndx->value64 <= minintvalues[0] || opndx->value64 > maxintvalues[0] ) {
/* use long format of MOV for 64-bit if value won't fit in a signed DWORD */
if ( CodeInfo->Ofssize == USE64 &&
CodeInfo->token == T_MOV &&
CurrOpnd == OPND2 &&
( CodeInfo->opnd[OPND1].type & OP_R64 ) &&
( opndx->value64 > LONG_MAX || opndx->value64 < LONG_MIN ||
(opndx->explicit && ( opndx->mem_type == MT_QWORD || opndx->mem_type == MT_SQWORD ) ) ) ) {
// CodeInfo->iswide = 1; /* has been set by first operand already */
CodeInfo->opnd[CurrOpnd].type = OP_I64;
CodeInfo->opnd[CurrOpnd].data32h = opndx->hvalue;
return( NOT_ERROR );
}
if ( opndx->value64 <= minintvalues[0] || opndx->value64 > maxintvalues[0] ) {
DebugMsg1(("idata_nofixup: error, hvalue=%Xh\n", opndx->hvalue ));
return( EmitConstError( opndx ) );
}
#endif
/* v2.06: code simplified.
* to be fixed: the "wide" bit should not be set here!
* Problem: the "wide" bit isn't set in memory_operand(),
* probably because of the instructions which accept both
* signed and unsigned arguments (ADD, CMP, ... ).
*/
if ( opndx->explicit ) {
/* size coercion for immediate value */
CodeInfo->const_size_fixed = TRUE;
size = SizeFromMemtype( opndx->mem_type,
opndx->Ofssize,
opndx->type );
/* don't check if size and value are compatible. */
switch ( size ) {
case 1: op_type = OP_I8; break;
case 2: op_type = OP_I16; break;
case 4: op_type = OP_I32; break;
default:
DebugMsg1(("idata_nofixup: invalid size %d for immediate operand\n", size ));
return( EmitError( INVALID_INSTRUCTION_OPERANDS ) );
}
} else {
/* use true signed values for BYTE only! */
if ( (int_8)value == value )
op_type = OP_I8;
//else if ( value <= SHRT_MAX && value >= SHRT_MIN )
/* v2.04: range FFFF0000-FFFF7FFF is also acceptable for 16-bit */
//else if ( value <= USHRT_MAX && value >= SHRT_MIN )
/* v2.04b: JWASMR needs a 1L */
//else if( value <= USHRT_MAX && value >= - (USHRT_MAX+1) )
/* v2.07: JWASMR needs 0L before the - op */
//else if( value <= USHRT_MAX && value >= - USHRT_MAX )
else if( value <= USHRT_MAX && value >= 0L - USHRT_MAX )
op_type = OP_I16;
else {
op_type = OP_I32;
}
}
switch ( CodeInfo->token ) {
case T_PUSH:
if ( opndx->explicit == FALSE ) {
if ( CodeInfo->Ofssize > USE16 && op_type == OP_I16 )
op_type = OP_I32;
}
if ( op_type == OP_I16 )
CodeInfo->prefix.opsiz = OPSIZE16( CodeInfo );
else if ( op_type == OP_I32 )
CodeInfo->prefix.opsiz = OPSIZE32( CodeInfo );
break;
case T_PUSHW:
if ( op_type != OP_I32 ) {
op_type = OP_I16;
if( (int_8)value == (int_16)value ) {
op_type = OP_I8;
}
}
break;
case T_PUSHD:
if ( op_type == OP_I16 )
op_type = OP_I32;
break;
}
/* v2.11: set the wide-bit if a mem_type size of > BYTE is set???
* actually, it should only be set if immediate is second operand
* ( and first operand is a memory ref with a size > 1 )
*/
if ( CurrOpnd == OPND2 )
if ( !(CodeInfo->mem_type & MT_SPECIAL) && ( CodeInfo->mem_type & MT_SIZE_MASK ) )
CodeInfo->iswide = 1;
CodeInfo->opnd[CurrOpnd].type = op_type;
DebugMsg1(("idata_nofixup exit, op_type=%" I32_SPEC "X\n", op_type ));
return( NOT_ERROR );
}
/* get an immediate operand with a fixup.
* output:
* - ERROR: error
* - NOT_ERROR: ok,
* CodeInfo->opnd_type[CurrOpnd] = OP_Ix
* CodeInfo->data[CurrOpnd] = value
* CodeInfo->InsFixup[CurrOpnd] = fixup
* CodeInfo->mem_type
* CodeInfo->prefix.opsiz
* to be fixed: don't modify CodeInfo->mem_type here!
*/
ret_code idata_fixup( struct code_info *CodeInfo, unsigned CurrOpnd, struct expr *opndx )
/***************************************************************************************/
{
//struct fixup *fixup;
enum fixup_types fixup_type;
enum fixup_options fixup_option = OPTJ_NONE;
int size;
uint_8 Ofssize; /* 1=32bit, 0=16bit offset for fixup */
DebugMsg1(("idata_fixup( CurrOpnd=%u ) enter [opndx.kind=%u mem_type=%Xh, CodeInfo.mem_type=%Xh]\n", CurrOpnd, opndx->kind, opndx->mem_type, CodeInfo->mem_type));
/* jmp/call/jcc/loopcc/jxcxz? */
if( IS_ANY_BRANCH( CodeInfo->token ) ) {
return( process_branch( CodeInfo, CurrOpnd, opndx ) );
}
CodeInfo->opnd[CurrOpnd].data32l = opndx->value;
if ( opndx->Ofssize != USE_EMPTY ) {
Ofssize = opndx->Ofssize;
} else if( ( opndx->sym->state == SYM_SEG )
|| ( opndx->sym->state == SYM_GRP )
|| ( opndx->instr == T_SEG ) ) {
Ofssize = USE16;
} else if( opndx->is_abs ) { /* an (external) absolute symbol? */
Ofssize = USE16;
} else {
Ofssize = GetSymOfssize( opndx->sym );
}
if( opndx->instr == T_SHORT ) {
/* short works for branch instructions only */
return( EmitErr( INVALID_INSTRUCTION_OPERANDS ) );
}
/* the code below should be rewritten.
* - an address operator ( OFFSET, LROFFSET, IMAGEREL, SECTIONREL,
* LOW, HIGH, LOWWORD, HIGHWORD, LOW32, HIGH32, SEG ) should not
* force a magnitude, but may set a minimal magnitude - and the
* fixup type, of course.
* - check if Codeinfo->mem_type really has to be set here!
*/
/* v2.06: added */
/* v2.10: modified */
//if ( opndx->explicit ) {
if ( opndx->explicit && !opndx->is_abs ) {
CodeInfo->const_size_fixed = TRUE;
if ( CodeInfo->mem_type == MT_EMPTY )
CodeInfo->mem_type = opndx->mem_type;
}
/* v2.03: don't ignore a "NEAR32 ptr" qualifier */
//if ( CodeInfo->mem_type == MT_EMPTY && CurrOpnd > OPND1 ) {
if ( CodeInfo->mem_type == MT_EMPTY && CurrOpnd > OPND1 && opndx->Ofssize == USE_EMPTY ) {
size = OperandSize( CodeInfo->opnd[OPND1].type, CodeInfo );
/* may be a forward reference, so wait till pass 2 */
if( Parse_Pass > PASS_1 && opndx->instr != EMPTY ) {
switch ( opndx->instr ) {
case T_SEG: /* v2.04a: added */
if( size && (size < 2 ) ) {
return( EmitErr( OPERANDS_MUST_BE_THE_SAME_SIZE, size, 2 ) );
}
break;
case T_OFFSET:
case T_LROFFSET:
#if IMAGERELSUPP
case T_IMAGEREL:
#endif
#if SECTIONRELSUPP
case T_SECTIONREL:
#endif
if( size && (size < 2 || ( Ofssize && size < 4 ))) {
return( EmitErr( OPERANDS_MUST_BE_THE_SAME_SIZE, size, ( 2 << Ofssize ) ) );
}
}
}
switch ( size ) {
case 1:
/* v2.05: if () added */
if ( opndx->is_abs || opndx->instr == T_LOW || opndx->instr == T_HIGH )
CodeInfo->mem_type = MT_BYTE;
break;
case 2:
/* v2.05: if () added */
if ( opndx->is_abs ||
CodeInfo->Ofssize == USE16 ||
opndx->instr == T_LOWWORD ||
opndx->instr == T_HIGHWORD )
CodeInfo->mem_type = MT_WORD;
break;
case 4:
CodeInfo->mem_type = MT_DWORD;
break;
#if AMD64_SUPPORT
case 8:
/* v2.05: it's questionable if size 8 is a good assumption for an
* immediate constant. It's valid for MOV <reg>, <imm> only.
*/
//case 8: CodeInfo->mem_type = MT_QWORD;break;
/* v2.05a: added */
if ( Ofssize == USE64 ) {
if ( CodeInfo->token == T_MOV &&
( CodeInfo->opnd[OPND1].type & OP_R64 ) )
CodeInfo->mem_type = MT_QWORD;
else if ( opndx->instr == T_LOW32 || opndx->instr == T_HIGH32 )
/* v2.10:added; LOW32/HIGH32 in expreval.c won't set mem_type anymore. */
CodeInfo->mem_type = MT_DWORD;
}
break;
#endif
}
}
if ( CodeInfo->mem_type == MT_EMPTY ) {
if( opndx->is_abs ) {