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Add template for ROM/RAM configuration
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VladimirUmek committed Oct 21, 2024
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4 changes: 3 additions & 1 deletion NXP.FRDM-MCXN947_BSP.pdsc
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</project>
<attributes/>
</example>

<example name="Blinky" folder="boards/frdmmcxn947/cmsis/examples/standalone/Blinky" doc="README.md">
<description>The Blinky example that shows the integration with the MCUXpresso Config Tools.</description>
<board name="FRDM-MCXN947" vendor="NXP" Dvendor="NXP:11"/>
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<template name="Simple Device project" path="/boards/frdmmcxn947/cmsis/templates/Device/Simple" file="Simple.csolution.yml" condition="Template_Device">
<description>Single-core project without TrustZone using MCUXpresso Config Tools</description>
</template>
<template name="Device project RAM/ROM" path="/boards/frdmmcxn947/cmsis/templates/Device/Simple2" file="Simple2.csolution.yml" condition="Template_Device">
<description>Single-core project with RAM and ROM targets, no TrustZone, MCUXpresso Config Tools</description>
</template>
<template name="TrustZone Device project" path="/boards/frdmmcxn947/cmsis/templates/Device/TrustZone" file="TrustZone.csolution.yml" condition="Template_Device">
<description>Single-core project with TrustZone</description>
</template>
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generator-import:
generated-by: 'MCUXpresso config tools Generated: 16/10/2024 15:42:42'
for-device: MCXN947
groups:
- group: ConfigTools board
files:
- file: board/clock_config.c
- file: board/clock_config.h
- file: board/peripherals.c
- file: board/peripherals.h
- file: board/pin_mux.c
- file: board/pin_mux.h
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<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_16 http://mcuxpresso.nxp.com/XSD/mex_configuration_16.xsd" uuid="02e923eb-f716-4ce7-8c9c-605cea7abbbd" version="16" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_16" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>MCXN947</processor>
<package>MCXN947VDF</package>
<mcu_data>ksdk2_0</mcu_data>
<cores selected="cm33_core0">
<core name="Cortex-M33 (Core #0)" id="cm33_core0" description=""/>
<core name="Cortex-M33 (Core #1)" id="cm33_core1" description=""/>
</cores>
<description>Configuration for MCXN947</description>
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
<update_include_paths>true</update_include_paths>
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="16.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="../MCUXpressoConfig/board/pin_mux.c" update_enabled="true"/>
<file path="../MCUXpressoConfig/board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>16.3.0</processor_version>
</pins_profile>
<functions_list>
<function name="BOARD_InitPins">
<description></description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins/>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="14.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="../MCUXpressoConfig/board/clock_config.c" update_enabled="true"/>
<file path="../MCUXpressoConfig/board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>16.3.0</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
<description></description>
<options/>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="cm33_core1">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="cm33_core1">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="cm33_core1">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources/>
<clock_outputs>
<clock_output id="CLK_144M_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
<clock_output id="CLK_48M_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
<clock_output id="FREQME_reference_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
<clock_output id="FREQME_target_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
<clock_output id="FRO_12M_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
<clock_output id="FRO_HF_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
<clock_output id="MAIN_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
<clock_output id="Slow_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
<clock_output id="gdet_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
<clock_output id="trng_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings/>
<called_from_default_init>true</called_from_default_init>
</clock_configuration>
</clock_configurations>
</clocks>
<dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
<generated_project_files/>
<dcdx_profile>
<processor_version>N/A</processor_version>
</dcdx_profile>
<dcdx_configurations/>
</dcdx>
<periphs name="Peripherals" version="15.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="../MCUXpressoConfig/board/peripherals.c" update_enabled="true"/>
<file path="../MCUXpressoConfig/board/peripherals.h" update_enabled="true"/>
</generated_project_files>
<peripherals_profile>
<processor_version>16.3.0</processor_version>
</peripherals_profile>
<functional_groups>
<functional_group name="BOARD_InitPeripherals" uuid="dadba190-16f6-4a39-b99a-26a4d5e08346" called_from_default_init="true" id_prefix="" core="cm33_core0">
<description></description>
<options/>
<dependencies/>
<instances>
<instance name="NVIC" uuid="5108961c-35a4-4fff-8ade-e1f53c31ba2d" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
<config_set name="nvic">
<array name="interrupt_table"/>
<array name="interrupts"/>
</config_set>
</instance>
</instances>
</functional_group>
</functional_groups>
<components>
<component name="system" uuid="7d43a0f9-d73e-436f-96bc-0c6df25b8f0d" type_id="system">
<config_set_global name="global_system_definitions">
<setting name="user_definitions" value=""/>
<setting name="user_includes" value=""/>
<setting name="global_init" value=""/>
</config_set_global>
</component>
<component name="uart_cmsis_common" uuid="ea846b01-97b8-4b82-8aaf-9a8a1d23c808" type_id="uart_cmsis_common">
<config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
</component>
<component name="msg" uuid="dba0c023-a45c-4f1e-9f37-5b2a840fb950" type_id="msg">
<config_set_global name="global_messages"/>
</component>
<component name="gpio_adapter_common" uuid="28eb12a6-b5cf-41bb-9892-50759f05670e" type_id="gpio_adapter_common">
<config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
</component>
<component name="generic_uart" uuid="839b9a93-8047-4e49-889a-09eb04e4cc47" type_id="generic_uart">
<config_set_global name="global_uart"/>
</component>
<component name="generic_enet" uuid="962ace00-e833-414c-b58d-ec43b31b4bc8" type_id="generic_enet">
<config_set_global name="global_enet"/>
</component>
<component name="generic_can" uuid="20c081ec-ba6a-49ab-8f84-e0e56d294ef3" type_id="generic_can">
<config_set_global name="global_can"/>
</component>
</components>
</periphs>
<tee name="TEE" version="7.0" enabled="false" update_project_code="true">
<generated_project_files/>
<tee_profile>
<processor_version>N/A</processor_version>
</tee_profile>
</tee>
</tools>
</configuration>
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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to setup clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Set up wait states of the flash.
*
* 3. Set up all dividers.
*
* 4. Set up all selectors to provide selected clocks.
*
*/

/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v14.0
processor: MCXN947
package_id: MCXN947VDF
mcu_data: ksdk2_0
processor_version: 16.3.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */

#include "fsl_clock.h"
#include "clock_config.h"
#include "fsl_spc.h"

/*******************************************************************************
* Definitions
******************************************************************************/

/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
extern uint32_t SystemCoreClock;

/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockRUN();
}

/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN
called_from_default_init: true
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FREQME_reference_clock.outFreq, value: 144 MHz}
- {id: FREQME_target_clock.outFreq, value: 144 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 48 MHz}
- {id: Slow_clock.outFreq, value: 12 MHz}
- {id: System_clock.outFreq, value: 48 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */

/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
{
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */

/* FRO OSC setup - begin, attach FRO12M to MainClock for safety switching */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12M first to ensure we can change the clock setting */

/* Set the LDO_CORE VDD regulator to 1.0 V voltage level */
spc_active_mode_core_ldo_option_t ldoOpt = {
.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage,
.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength,
};
SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOpt);
/* Set the DCDC VDD regulator to 1.0 V voltage level */
spc_active_mode_dcdc_option_t dcdcOpt = {
.DCDCVoltage = kSPC_DCDC_MidVoltage,
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength,
};
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &dcdcOpt);
/* Configure Flash wait-states to support 1V voltage level and 48000000Hz frequency */;
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
/* Specifies the 1V operating voltage for the SRAM's read/write timing margin */
spc_sram_voltage_config_t sramCfg = {
.operateVoltage = kSPC_sramOperateAt1P0V,
.requestVoltageUpdate = true,
};
SPC_SetSRAMOperateVoltage(SPC0, &sramCfg);

CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */

/* Configure FREQME clock */
SYSCON->CLOCK_CTRL |=
SYSCON_CLOCK_CTRL_FRO_HF_ENA_MASK | SYSCON_CLOCK_CTRL_FRO12MHZ_ENA_MASK |
SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; /* Enable FRO 1M, 12M and HF to frequency measure module */
CLOCK_EnableClock(kCLOCK_InputMux);
INPUTMUX->FREQMEAS_REF = INPUTMUX_FREQMEAS_REF_INP(2);
INPUTMUX->FREQMEAS_TAR = INPUTMUX_FREQMEAS_REF_INP(2);

/*!< Set up clock selectors */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);
CLOCK_AttachClk(kFRO_HF_to_FLEXSPI); /*!< Switch FLEXSPI to FRO_HF */

/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */

/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
}

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