trying to be less x86 specific

src/SUMMARY.md

@@ -32,3 +32,9 @@
 		- [Multitâche](x86_64/premiers-pas/06-multitache.md)
 		- [Tache utilisateur](x86_64/premiers-pas/06-tache-utilisateur.md)
 		- [Epilogue](x86_64/premiers-pas/06-epilogue.md)
+- [drivers]()
+	- [cartes réseaux]()
+		- [e1000](drivers/cartes-réseaux/E1000.md)
+		- [RTL8139](drivers/cartes-réseaux/RTL8139.md)
+	- [communication série]()
+		- [UART8250](drivers/communication-serie/UART8250.md)

src/drivers/cartes-réseaux/E1000.md

@@ -0,0 +1,7 @@
+# E1000
+
+# Références
+
+- [Intel i217 datasheet](https://www.mouser.com/datasheet/2/612/i217-ethernet-controller-datasheet-257741.pdf)
+- [Intel 82540EM datasheet](https://www.intel.com/content/dam/doc/manual/pci-pci-x-family-gbe-controllers-software-dev-manual.pdf)
+

src/drivers/cartes-réseaux/RTL8139.md

@@ -0,0 +1,5 @@
+# RTL8139
+
+# Référence
+
+- [RTL8139D Datasheet](http://realtek.info/pdf/rtl8139d.pdf)

src/drivers/communication-serie/UART8250.md

@@ -0,0 +1,45 @@
+# UART8250 / UART16750
+
+<div align="center">
+
+[![NS 8250B](https://upload.wikimedia.org/wikipedia/commons/c/ce/UART_chip_NS_8250B.jpg)](https://commons.wikimedia.org/wiki/File:UART_chip_NS_8250B.jpg)
+
+</div>
+
+## Les registres
+
+| Offset           |  Nom                                    | Ecriture  | Lecture |
+| -----------------|-----------------------------------------|-----------|---------|
+| 0x0 (DLAB == 0)  | Transmit Holding Register (THR)         | ✔️        | ❌     |
+| 0x0 (DLAB == 0)  | Receive Buffer Register (RBR)           | ❌        | ✔️     |
+| 0x1 (DLAB == 0)  | Interrupt Enable Register (IER)         | ✔️        | ✔️     |
+| 0x2              | Interrupt Identification Register (IIR) | ❌        | ✔️     |
+| 0x3              | Line Control Register (LCR)             | ✔️        | ✔️     |
+| 0x4              | Modem Control Register (MCR)            | ✔️        | ✔️     |
+| 0x5              | Line Status Register (LSR)              | ✔️        | ✔️     |
+| 0x6              | Modem Status Register (MSR)             | ✔️        | ✔️     |
+| 0x7              | Scratch Register (SCR)                  | ✔️        | ✔️     |
+| 0x0 (DLAB == 1)  | Divisor Latch LSB (DLL)                 | ✔️        | ✔️     |
+| 0x1 (DLAB == 1)  | Divisor Latch MSB (DLH)                 | ✔️        | ✔️     |
+
+### Transmit Holding Register (THR)
+
+Tout ce qui sera ecrit sur ce registre sera transmis en liaison série.
+
+### Receive Buffer Register (RBR)
+
+
+
+## Interrupt Enable Register (IER)
+
+| 7-4      | 3            | 2                    | 1         | 0                       |
+|----------|--------------|----------------------|-----------|-------------------------|
+| reserved | MODEM Status | Receiver Line Status | THR Empty | Received Data Available |
+
+## Interrupt Identification Register (IIR)
+
+
+
+## Références
+
+- [Datasheet](https://web.archive.org/web/20160503070506/http://archive.pcjs.org/pubs/pc/datasheets/8250A-UART.pdf)