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Add support for Rachel ESP32 target (#174)
* Add support for Rachel ESP32 target * Update config.h
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// Target definition | ||
#define RG_TARGET_NAME "RACHEL-ESP32" | ||
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// Storage | ||
#define RG_STORAGE_ROOT "/sd" | ||
#define RG_STORAGE_SDSPI_HOST SPI3_HOST | ||
#define RG_STORAGE_SDSPI_SPEED SDMMC_FREQ_DEFAULT | ||
// #define RG_STORAGE_SDMMC_HOST SDMMC_HOST_SLOT_1 | ||
// #define RG_STORAGE_SDMMC_SPEED SDMMC_FREQ_DEFAULT | ||
// #define RG_STORAGE_FLASH_PARTITION "vfs" | ||
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// Audio | ||
#define RG_AUDIO_USE_INT_DAC 0 // 0 = Disable, 1 = GPIO25, 2 = GPIO26, 3 = Both | ||
#define RG_AUDIO_USE_EXT_DAC 1 // 0 = Disable, 1 = Enable | ||
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// Video | ||
#define RG_SCREEN_DRIVER 0 // 0 = ILI9341 | ||
#define RG_SCREEN_HOST SPI2_HOST | ||
#define RG_SCREEN_SPEED SPI_MASTER_FREQ_40M // SPI_MASTER_FREQ_80M | ||
#define RG_SCREEN_BACKLIGHT 1 | ||
#define RG_SCREEN_WIDTH 240 //1.3 inch 240 2.4 inch 320 | ||
#define RG_SCREEN_HEIGHT 240 | ||
#define RG_SCREEN_ROTATE 0 | ||
#define RG_SCREEN_MARGIN_TOP 0 | ||
#define RG_SCREEN_MARGIN_BOTTOM 0 | ||
#define RG_SCREEN_MARGIN_LEFT 0 | ||
#define RG_SCREEN_MARGIN_RIGHT 0 | ||
#define RG_SCREEN_INIT() \ | ||
ILI9341_CMD(0x01); \ | ||
ILI9341_CMD(0x3A, 0x55); \ | ||
ILI9341_CMD(0x20); \ | ||
ILI9341_CMD(0xCF, 0x00, 0xc3, 0x30); \ | ||
ILI9341_CMD(0xED, 0x64, 0x03, 0x12, 0x81); \ | ||
ILI9341_CMD(0xE8, 0x85, 0x00, 0x78); \ | ||
ILI9341_CMD(0xCB, 0x39, 0x2c, 0x00, 0x34, 0x02); \ | ||
ILI9341_CMD(0xF7, 0x20); \ | ||
ILI9341_CMD(0xEA, 0x00, 0x00); \ | ||
ILI9341_CMD(0xC0, 0x1B); \ | ||
ILI9341_CMD(0xC1, 0x12); \ | ||
ILI9341_CMD(0xC5, 0x32, 0x3C); \ | ||
ILI9341_CMD(0xC7, 0x91); \ | ||
ILI9341_CMD(0x36, (0xA0| 0X08)); /* 1.3 inch 0XA0|0X08 (2.4 inch 0x00|0x80) */ \ | ||
ILI9341_CMD(0xB1, 0x00, 0x10); \ | ||
ILI9341_CMD(0xB6, 0x0A, 0xA2); \ | ||
ILI9341_CMD(0xF6, 0x01, 0x30); \ | ||
ILI9341_CMD(0xF2, 0x00); \ | ||
ILI9341_CMD(0x26, 0x01); \ | ||
ILI9341_CMD(0xE0, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19); \ | ||
ILI9341_CMD(0xE1, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19); \ | ||
ILI9341_CMD(0x11); \ | ||
ILI9341_CMD(0x29); | ||
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// Input | ||
// Refer to rg_input.h to see all available RG_KEY_* and RG_GAMEPAD_*_MAP types | ||
#define RG_GAMEPAD_GPIO_MAP {\ | ||
{RG_KEY_UP, GPIO_NUM_7, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_RIGHT, GPIO_NUM_6, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_DOWN, GPIO_NUM_46, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_LEFT, GPIO_NUM_45, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_SELECT, GPIO_NUM_16, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_START, GPIO_NUM_17, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_MENU, GPIO_NUM_18, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_OPTION, GPIO_NUM_8, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_A, GPIO_NUM_15, GPIO_PULLUP_ONLY, 0},\ | ||
{RG_KEY_B, GPIO_NUM_5, GPIO_PULLUP_ONLY, 0},\ | ||
} | ||
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// Battery | ||
#define RG_BATTERY_DRIVER 1 | ||
#define RG_BATTERY_ADC_UNIT ADC_UNIT_1 | ||
#define RG_BATTERY_ADC_CHANNEL ADC_CHANNEL_3 | ||
#define RG_BATTERY_CALC_PERCENT(raw) (((raw) * 2.f - 3500.f) / (4200.f - 3500.f) * 100.f) | ||
#define RG_BATTERY_CALC_VOLTAGE(raw) ((raw) * 2.f * 0.001f) | ||
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// Status LED | ||
#define RG_GPIO_LED GPIO_NUM_38 | ||
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// SPI Display (back up working) | ||
#define RG_GPIO_LCD_MISO GPIO_NUM_NC | ||
#define RG_GPIO_LCD_MOSI GPIO_NUM_12 | ||
#define RG_GPIO_LCD_CLK GPIO_NUM_48 | ||
#define RG_GPIO_LCD_CS GPIO_NUM_14 | ||
#define RG_GPIO_LCD_DC GPIO_NUM_47 | ||
#define RG_GPIO_LCD_BCKL GPIO_NUM_39 | ||
#define RG_GPIO_LCD_RST GPIO_NUM_3 | ||
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#define RG_GPIO_SDSPI_MISO GPIO_NUM_9 | ||
#define RG_GPIO_SDSPI_MOSI GPIO_NUM_11 | ||
#define RG_GPIO_SDSPI_CLK GPIO_NUM_13 | ||
#define RG_GPIO_SDSPI_CS GPIO_NUM_10 | ||
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// External I2S DAC | ||
#define RG_GPIO_SND_I2S_BCK 41 | ||
#define RG_GPIO_SND_I2S_WS 42 | ||
#define RG_GPIO_SND_I2S_DATA 40 | ||
// #define RG_GPIO_SND_AMP_ENABLE 18 |
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# RACHEL ESP32 | ||
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- Status: | ||
- Ref: | ||
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# Hardware info | ||
- ESP32-S3R8 (SoC 8MB PSRAM) | ||
- W25Q128JVPIQ (16MB FLASH ) | ||
- NS4168 (I2S DAC) | ||
- st7789 (1.3 inch ips) | ||
- TP4056 (Lipo Charger IC) | ||
- battery (600mAh) | ||
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# Images | ||
![device.jpg](device.jpg) | ||
![device_top.jpg](device_top.jpg) |
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import os | ||
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os.environ["IDF_TARGET"] = "esp32s3" | ||
os.environ["FW_FORMAT"] = "esplay" |
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# | ||
# Serial flasher config | ||
# | ||
CONFIG_ESPTOOLPY_PORT="/dev/ttyUSB0" | ||
CONFIG_ESPTOOLPY_BAUD_115200B=n | ||
CONFIG_ESPTOOLPY_BAUD_230400B=n | ||
CONFIG_ESPTOOLPY_BAUD_921600B=y | ||
CONFIG_ESPTOOLPY_BAUD_2MB=n | ||
CONFIG_ESPTOOLPY_BAUD=921600 | ||
CONFIG_ESPTOOLPY_COMPRESSED=y | ||
CONFIG_ESPTOOLPY_FLASHMODE="dio" | ||
CONFIG_ESPTOOLPY_FLASHFREQ_80M=y | ||
CONFIG_ESPTOOLPY_FLASHFREQ_40M=n | ||
CONFIG_ESPTOOLPY_FLASHFREQ_26M=n | ||
CONFIG_ESPTOOLPY_FLASHFREQ_20M=n | ||
CONFIG_ESPTOOLPY_FLASHFREQ="80m" | ||
CONFIG_ESPTOOLPY_FLASHSIZE_1MB=n | ||
CONFIG_ESPTOOLPY_FLASHSIZE_2MB=n | ||
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=n | ||
CONFIG_ESPTOOLPY_FLASHSIZE_8MB=n | ||
CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y | ||
CONFIG_ESPTOOLPY_FLASHSIZE="16MB" | ||
CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y | ||
CONFIG_ESPTOOLPY_FLASHMODE_QIO=y | ||
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# | ||
# Compiler options | ||
# | ||
CONFIG_COMPILER_OPTIMIZATION_DEFAULT=n | ||
CONFIG_COMPILER_OPTIMIZATION_SIZE=y | ||
# IMPORTANT: ENABLE=y adds almost 50K to the executable, can't fit in our current 2.5MB goal... | ||
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=n | ||
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y | ||
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=n | ||
CONFIG_COMPILER_CXX_EXCEPTIONS=n | ||
CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y | ||
CONFIG_COMPILER_STACK_CHECK_MODE_NORM=n | ||
CONFIG_COMPILER_STACK_CHECK_MODE_STRONG=n | ||
CONFIG_COMPILER_STACK_CHECK_MODE_ALL=n | ||
CONFIG_COMPILER_STACK_CHECK=n | ||
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# | ||
# SPI configuration | ||
# | ||
CONFIG_SPI_MASTER_IN_IRAM=y | ||
CONFIG_SPI_MASTER_ISR_IN_IRAM=y | ||
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# | ||
# ESP32-specific | ||
# | ||
CONFIG_ESP32_REV_MIN_0=n | ||
CONFIG_ESP32_REV_MIN_1=y | ||
CONFIG_ESP32_REV_MIN_2=n | ||
CONFIG_ESP32_REV_MIN_3=n | ||
CONFIG_ESP32_REV_MIN=1 | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_80=n | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_160=n | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 | ||
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=n | ||
CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y | ||
CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=n | ||
CONFIG_ESP_SYSTEM_PANIC_GDBSTUB=n | ||
CONFIG_ESP_DEBUG_OCDAWARE=n | ||
CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192 | ||
CONFIG_ESP_INT_WDT=y | ||
CONFIG_ESP_TASK_WDT=n | ||
CONFIG_NEWLIB_NANO_FORMAT=y | ||
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# | ||
# SPI RAM config | ||
# | ||
CONFIG_SPIRAM=y | ||
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CONFIG_ESP32S3_SPIRAM_SUPPORT=y | ||
CONFIG_SPIRAM_BOOT_INIT=y | ||
CONFIG_SPIRAM_IGNORE_NOTFOUND=y | ||
CONFIG_SPIRAM_USE_MEMMAP=n | ||
CONFIG_SPIRAM_USE_CAPS_ALLOC=n | ||
CONFIG_SPIRAM_USE_MALLOC=y | ||
CONFIG_SPIRAM_TYPE_AUTO=y | ||
CONFIG_SPIRAM_TYPE_ESPPSRAM32=n | ||
CONFIG_SPIRAM_TYPE_ESPPSRAM64=n | ||
CONFIG_SPIRAM_SIZE=-1 | ||
CONFIG_SPIRAM_SPEED_40M=n | ||
CONFIG_SPIRAM_SPEED_80M=y | ||
CONFIG_SPIRAM_MEMTEST=y | ||
CONFIG_SPIRAM_CACHE_WORKAROUND=n | ||
CONFIG_SPIRAM_BANKSWITCH_ENABLE=n | ||
#CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 | ||
#CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=16384 | ||
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CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=32768 | ||
CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 | ||
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CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y | ||
CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y | ||
CONFIG_SPIRAM_OCCUPY_HSPI_HOST=n | ||
CONFIG_SPIRAM_OCCUPY_VSPI_HOST=y | ||
CONFIG_SPIRAM_OCCUPY_NO_HOST=n | ||
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CONFIG_SPIRAM_MODE_OCT=y | ||
CONFIG_SPIRAM_CLK_IO=30 | ||
CONFIG_SPIRAM_CS_IO=26 | ||
CONFIG_DEFAULT_PSRAM_CLK_IO=30 | ||
CONFIG_DEFAULT_PSRAM_CS_IO=26 | ||
ONFIG_SPIRAM_OCCUPY_NO_HOST=n | ||
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# | ||
# FAT Filesystem support | ||
# | ||
CONFIG_FATFS_CODEPAGE_437=y | ||
CONFIG_FATFS_CODEPAGE=437 | ||
CONFIG_FATFS_LFN_NONE=n | ||
CONFIG_FATFS_LFN_HEAP=y | ||
CONFIG_FATFS_LFN_STACK=n | ||
CONFIG_FATFS_MAX_LFN=255 | ||
CONFIG_FATFS_USE_FASTSEEK=y | ||
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# | ||
# FreeRTOS | ||
# | ||
CONFIG_FREERTOS_HZ=100 | ||
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE=n | ||
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL=y | ||
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=n | ||
CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y | ||
CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE=n | ||
CONFIG_FREERTOS_ASSERT_DISABLE=n | ||
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1024 | ||
CONFIG_FREERTOS_USE_TRACE_FACILITY=n | ||
CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS=n | ||
CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=n | ||
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# | ||
# Log output | ||
# | ||
CONFIG_LOG_DEFAULT_LEVEL_NONE=n | ||
CONFIG_LOG_DEFAULT_LEVEL_ERROR=n | ||
CONFIG_LOG_DEFAULT_LEVEL_WARN=y | ||
CONFIG_LOG_DEFAULT_LEVEL_INFO=n | ||
CONFIG_LOG_DEFAULT_LEVEL_DEBUG=n | ||
CONFIG_LOG_DEFAULT_LEVEL_VERBOSE=n | ||
CONFIG_LOG_DEFAULT_LEVEL=2 | ||
CONFIG_LOG_COLORS=y | ||
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# | ||
# Misc | ||
# | ||
# ODROID-GO partition table doesn't use any checksum | ||
CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS=y | ||
CONFIG_PARTITION_TABLE_MD5=n | ||
CONFIG_APP_BUILD_BOOTLOADER=n | ||
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# | ||
# HTTP Server | ||
# | ||
CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024 | ||
CONFIG_HTTPD_MAX_URI_LEN=1024 | ||
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# | ||
# TLS | ||
# | ||
# Not ideal but I don't want to deal with CAs right now :( | ||
CONFIG_ESP_TLS_INSECURE=y | ||
CONFIG_ESP_TLS_SKIP_SERVER_CERT_VERIFY=y | ||
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# | ||
# SPI Flash driver | ||
# | ||
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=n | ||
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# | ||
# Wi-Fi | ||
# | ||
CONFIG_ESP32_WIFI_IRAM_OPT=n | ||
CONFIG_ESP32_WIFI_RX_IRAM_OPT=n | ||
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# | ||
# Silence deprecations because I have no intention of fixing them right now | ||
# | ||
CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y | ||
CONFIG_I2S_SUPPRESS_DEPRECATE_WARN=y | ||
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# | ||
# Partition table | ||
# | ||
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set | ||
# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set | ||
# CONFIG_PARTITION_TABLE_TWO_OTA is not set | ||
CONFIG_PARTITION_TABLE_CUSTOM=y | ||
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="../partitions.csv" | ||
CONFIG_PARTITION_TABLE_FILENAME="../partitions.csv" |