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[WIP] V2021.10 nvec paz00 #1

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[WIP] V2021.10 nvec paz00 #1

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kwizart
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@kwizart kwizart commented Nov 19, 2021

This is a rebase of my tree from 2021.10 nvec paz00 driver.

Known not to work is EFI boot on tegra20 (works for tegra124).
please review.

kwizart
kwizart commented Nov 19, 2021
View reviewed changes
drivers/i2c/tegra_nvec.c Outdated
@@ -410,7 +411,7 @@ static int nvec_probe(struct udevice *dev)
{
struct nvec_t *nvec = dev_get_priv(dev);
const void *blob = gd->fdt_blob;
int node = dev->node.of_offset;
int node = dev->node_.of_offset;
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This should probably be deleted (can be squashed with the later patch).

kwizart
kwizart commented Nov 19, 2021
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drivers/i2c/tegra_nvec.c Outdated
@@ -425,7 +421,7 @@ static int nvec_probe(struct udevice *dev)

debug("NVEC initialization...\n");

if (nvec_decode_fdt(blob, node, nvec_data)) {
if (nvec_decode_fdt(nvec_data) {
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Missing bracket, will fix...

@kwizart kwizart changed the title V2021.10 nvec paz00 [WIP] V2021.10 nvec paz00 Nov 19, 2021
@kwizart
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kwizart commented Nov 19, 2021

It fails to build from source, I will revisit in the next days. I need to recover a known good and tested version...

@clamor-s
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clamor-s commented Dec 9, 2021

It fails to build from source, I will revisit in the next days. I need to recover a known good and tested version...

Sources were updated. May you rebase your PR please?

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kwizart commented Dec 9, 2021

Sure, I hope to update this over the week-end.

@clamor-s clamor-s force-pushed the master branch 3 times, most recently from ea9b2ac to 6edacb5 Compare January 1, 2022 18:14
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: Add standard PCI Config Address macros
2a8d402 
Lot of PCI and PCIe controllers are using standard Config Address for PCI
Configuration Mechanism #1 or its extended version.

So add PCI_CONF1_ADDRESS() and PCI_CONF1_EXT_ADDRESS() macros into U-Boot's
pci.h header file which can be suitable for most PCI and PCIe controller
drivers. Drivers do not have to invent their own macros and can use these
new U-Boot macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: gt64120: Use PCI_CONF1_ADDRESS() macro
2b29d79 
PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macro
247ffc6 
PCI mpc85xx driver uses extended format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: msc01: Use PCI_CONF1_ADDRESS() macro
f146bd9 
PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macro
d0dd49f 
PCI mvebu driver uses extended format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom
driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macro
86be29e 
PCI tegra driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macro
f031f07 
PCI fsl driver uses extended format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: mediatek: Use PCI_CONF1_EXT_ADDRESS() macro
022d43b 
PCI mediatek driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: sh7780: Use PCI_CONF1_ADDRESS() macro
7fabaa5 
PCI sh7780 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
x86: pci: Use PCI_CONF1_ADDRESS() macro
7598759 
x86 platform uses standard format of Config Address for PCI Configuration
Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macro
c49f1fa 
mcf5445x platform uses standard format of Config Address for PCI
Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
clamor-s pushed a commit that referenced this pull request Jan 18, 2022
@pali @trini
pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macro
2a67bf6 
sh7751 platform uses standard format of Config Address for PCI
Configuration Mechanism #1.

Commit 72c2f4a ("pci: sh7751: Convert to DM and DT probing") which did
conversion of PCI sh7751 driver to DM, broke access to config space as that
commit somehow swapped device and function bits in config address.

Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which
calculates Config Address correctly.

Also remove nonsense function sh7751_pci_addr_valid() which was introduced
in commit 72c2f4a ("pci: sh7751: Convert to DM and DT probing")
probably due to workarounded issues with mixing/swapping device and
function bits of config address which probably resulted in non-working
access to some devices. With correct composing of config address there
should not be such issue anymore.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 72c2f4a ("pci: sh7751: Convert to DM and DT probing")
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
digetx and others added 7 commits January 21, 2022 17:22
@digetx @clamor-s
Tegra: Support Tegra20 QEMU board
d9ab605 
Add device-tree and config for Tegra20 QEMU.

Link: https://github.com/grate-driver/tegra2_qemu
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
@ziswiler @clamor-s
tegra: lcd: video: integrate display driver for t30
14b7970 
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@jonasschwoebel @clamor-s
input: gpio-keys: create simple driver for handling gpio keys
7e492d5 
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
part_efi: support backup gpt use
25f10f7 
This patch adds support for correct work with backup gpt
without excessive log spam.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add transformer t20 board support
f01afd4 
Board derives from Ventana board

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add transformer t30 board support
4295072 
Board derives from Cardhu board

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF101 support
89909a4 
Tested-by: Antoni Aloy Torrens <aaloytorrens@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
clamor-s added 10 commits January 21, 2022 19:21
@clamor-s
asus: add TF101G support
ba36520 
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add SL101 support
4eb732f 
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF201 support
b2ef397 
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF300T support
9bca69a 
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF300TG support
33a98d6 
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF300TL support
b69e4eb 
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF600T support
5cebc2e 
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add TF700T support
c70c1ab 
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: add P1801-T support
39e2838 
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
asus: grouper: initial support
60fe365 
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
@clamor-s
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Sure, I hope to update this over the week-end.

Rebase your changes please.

marvintwentyfour and others added 4 commits January 23, 2022 18:31
@marvintwentyfour @kwizart
ARM: tegra: add nvec driver
2522ee3 
Adopted version of nvec driver from linux kernel with
keyboard support only.

Signed-off-by: Andrey Danin <danindrey@mail.ru>
[squashed, forward ported, and cleaned up]
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
@marvintwentyfour @kwizart
ARM: tegra: add nvec keyboard driver
1269b2f 
Adopted version of nvec keyboard driver from linux kernel.

Signed-off-by: Andrey Danin <danindrey@mail.ru>
[squashed, forward ported, and cleaned up]
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
@marvintwentyfour @kwizart
ARM: tegra: paz00: enable nvec keyboard support
aededbc 
Signed-off-by: Andrey Danin <danindrey@mail.ru>
[squashed, forward ported, and cleaned up]
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
@kwizart
i2c: tegra_nvec: Use dev_read_addr_ptr/u32_default
ad0aff9 
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
@kwizart kwizart force-pushed the v2021.10-nvec-paz00 branch from e8ecf7b to 3a63e25 Compare January 23, 2022 17:32
@kwizart
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kwizart commented Jan 23, 2022

The nvec fork for paz00 is currently maintained at
https://gitlab.com/ac100/u-boot-ac100-exp/-/merge_requests/2
I'm seeking review from @marvintwentyfour in a first step.

I've rebased from grate until then.

@kwizart kwizart force-pushed the v2021.10-nvec-paz00 branch from 3a63e25 to ad0aff9 Compare January 23, 2022 17:35
clamor-s pushed a commit that referenced this pull request Oct 18, 2022
@matwey @trini
board: ti: common: board_detect: Fix EEPROM read quirk
bf63766 
There are three different kinds of EEPROM possibly present on boards.
  1. 1byte address. For those we should avoid 2byte address in order
     not to rewrite the data. Second byte of the address can potentially
     be interpreted as the data to write.
  2. 2byte address with defined behaviour. When we try to use 1byte
     address they just return "FF FF FF FF ... FF"
  3. 2byte address with undefined behaviour (for instance, 24LC32AI).
     When we try to use 1byte address, then their internal read
     pointer is changed to some value. Subsequential reads may be
     broken.

To gracefully handle both case #1 and case u-boot#3 we read all required
data from EEPROM at once (about 80 bytes). So either all the data is
valid or we fallback to 2byte address.

Cc: Nishanth Menon <nm@ti.com>
Fixes: a58147c ("board: ti: common: board_detect: Do 1byte address checks first.")
Reference: https://lore.kernel.org/all/CAJs94Ebdd4foOjhGFu9Bop0v=B1US9neDLxfhgcY23ukgLzFOQ@mail.gmail.com/
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
@kwizart
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kwizart commented Nov 25, 2022

Closing as I've submitted a new PR with a new base branch
#2

@kwizart kwizart closed this Nov 25, 2022
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6 participants
@kwizart @clamor-s @digetx @ziswiler @jonasschwoebel @marvintwentyfour