This project mensures the time reaction of a human being in a Field-Programmable Gate Array (FPGA). When it initializes, a LED sinalizes the event and as soon as the LED goes off, the timer starts.
All the code was made in low level and all the operations were implemented in VHDL. Also, a processor was created to execute the instructions. The figure below shows the block diagram of the project.
The finite state machine is shown in the figure below.