-
Notifications
You must be signed in to change notification settings - Fork 0
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
- Loading branch information
1 parent
b751dd6
commit 76dd465
Showing
17 changed files
with
298 additions
and
253 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,61 +1,54 @@ | ||
| { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.ide.project", | ||
| "content": { | ||
| "metaDataVersion": "1.3.0", | ||
| "name": "com.microchip.mcu8.mplabx.project.pic16f13145-multiple-clb-configurations-mplab-mcc", | ||
| "version": "1.0.0", | ||
| "displayName": "Getting Started with Multiple Configurations for the Configurable Logic Block (CLB) - Use Case for the PIC16F13145 Microcontroller with MCC Melody", | ||
| "projectName": "pic16f13145-multiple-clb-configurations-mplab-mcc", | ||
| "shortDescription": "This repository provides an MPLAB X project highlighting how different bitstream configurations for the Configurable Logic Block (CLB) peripheral can be changed and loaded at runtime.", | ||
| "ide": { | ||
| "name": "MPLAB X", | ||
| "semverRange": ">=6.15.0" | ||
| }, | ||
| "compiler": [ | ||
| { | ||
| "name": "XC8", | ||
| "semverRange": "^2.45.0" | ||
| } | ||
| ], | ||
| "dfp": { | ||
| "name": "PIC16F1xxxx_DFP", | ||
| "semverRange": "^1.23.382" | ||
| }, | ||
| "configurator": { | ||
| "name": "MCC", | ||
| "semverRange": ">=5.4.1" | ||
| }, | ||
| "device": { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.portal.contentRef", | ||
| "content": { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.device", | ||
| "name": "PIC16F13145", | ||
| "versionRange": "*" | ||
| } | ||
| }, | ||
| "author": "Cristian Cristea", | ||
| "peripherals": [ | ||
| "CLB", | ||
| "NVMCTRL", | ||
| "CRC" | ||
| ], | ||
| "keywords": [ | ||
| "CLB", | ||
| "Melody" | ||
| ], | ||
| "additionalData": { | ||
| "longDescription": { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.portal.fileRef", | ||
| "content": { | ||
| "metaDataVersion": "1.0.0", | ||
| "fileName": "./README.md", | ||
| "mimeType": "text/markdown" | ||
| } | ||
| } | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.ide.project", | ||
| "content": { | ||
| "metaDataVersion": "1.3.0", | ||
| "name": "com.microchip.mcu8.mplabx.project.pic16f13145-multiple-clb-configurations-mplab-mcc", | ||
| "version": "1.1.0", | ||
| "displayName": "Getting Started with Multiple Configurations for the Configurable Logic Block (CLB) - Use Case for the PIC16F13145 Microcontroller with MCC Melody", | ||
| "projectName": "pic16f13145-multiple-clb-configurations-mplab-mcc", | ||
| "shortDescription": "This repository provides an MPLAB X project highlighting how different bitstream configurations for the Configurable Logic Block (CLB) peripheral can be changed and loaded at runtime.", | ||
| "ide": { | ||
| "name": "MPLAB X", | ||
| "semverRange": ">=6.20.0" | ||
| }, | ||
| "compiler": [ | ||
| { | ||
| "name": "XC8", | ||
| "semverRange": "^2.50.0" | ||
| } | ||
| ], | ||
| "dfp": { | ||
| "name": "PIC16F1xxxx_DFP", | ||
| "semverRange": "^1.25.389" | ||
| }, | ||
| "configurator": { | ||
| "name": "MCC", | ||
| "semverRange": ">=5.7.1" | ||
| }, | ||
| "device": { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.portal.contentRef", | ||
| "content": { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.device", | ||
| "name": "PIC16F13145", | ||
| "versionRange": "*" | ||
| } | ||
| }, | ||
| "author": "Cristian Cristea", | ||
| "peripherals": ["CLB", "NVMCTRL", "CRC"], | ||
| "keywords": ["CLB", "Melody"], | ||
| "additionalData": { | ||
| "longDescription": { | ||
| "metaDataVersion": "1.0.0", | ||
| "category": "com.microchip.portal.fileRef", | ||
| "content": { | ||
| "metaDataVersion": "1.0.0", | ||
| "fileName": "./README.md", | ||
| "mimeType": "text/markdown" | ||
| } | ||
| } | ||
| } | ||
| } | ||
| } | ||
| } |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1 +1 @@ | ||
| {"type":"Microchip CLB Synthesizer Design","version":"1.0","name":"design","projectId":"ba169e1d-89ec-46a6-9de6-871a15b7f491","creationDate":"2023-10-09T11:51:23.746Z","backendversion":"23.12.1-4","device":"PIC16F13145","clockDivider":4,"schematics":[{"id":"e07450dd-53af-4f30-9cdf-9ef9385a9616","data":{"class":"GraphLinksModel","linkKeyProperty":"key","linkFromPortIdProperty":"fromPort","linkToPortIdProperty":"toPort","nodeDataArray":[{"key":"outputport","category":"outputport","portname":"PPS_OUT0","size":"130 20","loc":"290 20","inputmodifier":"synchronized","angle":90,"flipX":false},{"key":"dff","category":"dff","loc":"230 -50"},{"category":"not","loc":"340 -70","key":4}],"linkDataArray":[{"from":4,"to":"dff","fromPort":"OUT","toPort":"D","key":-3,"points":[381,-70,391,-70,388,-70,388,-70,396,-70,396,-108,172,-108,172,-70,170,-70,180,-70]},{"from":"dff","to":4,"fromPort":"OUT","toPort":"IN1","key":-2,"points":[280,-70,290,-70,290.5,-70,290.5,-70,291,-70,301,-70]},{"from":"dff","to":"outputport","fromPort":"OUT","toPort":"IN","key":-4,"points":[280,-70,290,-70,290,-70,290,-55,290,-55,290,-45]}]}}],"hdls":[],"mnmap":[{"name":"Get Started","id":"af2f626b-f424-4b9f-a254-85537bd18f15","type":3},{"name":"main","id":"e07450dd-53af-4f30-9cdf-9ef9385a9616","type":0}],"entryFile":"main"} | ||
| {"type":"Microchip CLB Synthesizer Design","version":"1.0","name":"New Design","projectId":"ba169e1d-89ec-46a6-9de6-871a15b7f491","creationDate":"2023-10-09T11:51:23.746Z","backendversion":"24.2.1-4","device":"PIC16F13145","clockDivider":4,"schematics":[{"id":"e07450dd-53af-4f30-9cdf-9ef9385a9616","data":{"class":"GraphLinksModel","linkKeyProperty":"key","linkFromPortIdProperty":"fromPort","linkToPortIdProperty":"toPort","nodeDataArray":[{"key":"outputport","category":"outputport","portname":"PPS_OUT0","size":"130 20","loc":"290 20","inputmodifier":"synchronized","angle":90,"flipX":false},{"key":"dff","category":"dff","loc":"230 -50"},{"category":"not","loc":"340 -70","key":4}],"linkDataArray":[{"from":4,"to":"dff","fromPort":"OUT","toPort":"D","key":-3,"points":[381,-70,391,-70,388,-70,388,-70,396,-70,396,-108,172,-108,172,-70,170,-70,180,-70]},{"from":"dff","to":4,"fromPort":"OUT","toPort":"IN1","key":-2,"points":[280,-70,290,-70,290.5,-70,290.5,-70,291,-70,301,-70]},{"from":"dff","to":"outputport","fromPort":"OUT","toPort":"IN","key":-4,"points":[280,-70,290,-70,290,-70,290,-55,290,-55,290,-45]}]}}],"hdls":[],"mnmap":[{"name":"Get Started","id":"af2f626b-f424-4b9f-a254-85537bd18f15","type":3},{"name":"main","id":"e07450dd-53af-4f30-9cdf-9ef9385a9616","type":0}],"entryFile":"main"} |
Oops, something went wrong.