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src: gpu: intel: jit: conv: fix reorder zp precomp page faults
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hidefromkgb committed Jan 22, 2025
1 parent 9fa46da commit fbe6b3c
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8 changes: 8 additions & 0 deletions src/gpu/intel/jit/conv/config.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -854,6 +854,14 @@ status_t init_tensor_layouts(
wei_md.extra.dst_size *= get_channels(dst_layout);
}
wei_md.extra.flags |= compensation_gpu_conv_asymmetric_src;
// since tmasks are used on precalc ZPs only if absolutely necessary
// (due to significant computational costs in most cases) some block
// reads can exceed the total buffer size, resulting in page faults;
// padding at the end is the easiest way to avoid that, as 1-2 KB of
// additional VRAM per precalc buffer is virtually free
// TODO: vectorize send params (in jit:ir:v2 maybe?) and add tmasks!
const dim_t max_read_blk_bytes = 512;
wei_md.extra.dst_size += max_read_blk_bytes * 2;
}
return status::success;
}
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