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UTIL: fix memory barrier for aarch64 #939

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Sergei-Lebedev
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What

Fixes memory barrier in TL SHM.

Why ?

dmb guarantees only ordering, with dsb we correctly wait for store to finish before signaling

@janjust
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janjust commented Mar 8, 2024

@bureddy Hey Deva, can you take a quick look - super small patch, but fixes a critical issue on GH systems.

@Sergei-Lebedev Sergei-Lebedev force-pushed the topic/fix_membarrier_aarch64 branch from a5bb97a to 72ec5d6 Compare March 15, 2024 07:59
@Sergei-Lebedev Sergei-Lebedev enabled auto-merge (squash) March 15, 2024 07:59
@Sergei-Lebedev Sergei-Lebedev merged commit e991769 into openucx:master Mar 15, 2024
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4 participants