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imxrt, rtt: Make RTT buffer and region sizes configurable #368

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merged 1 commit into from
Nov 7, 2024
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imxrt, rtt: Make RTT buffer and region sizes configurable #368

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46 changes: 33 additions & 13 deletions devices/pipe-rtt/rtt.c
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Original file line number Diff line number Diff line change
Expand Up @@ -55,14 +55,34 @@ struct rtt_desc {

static struct {
/* NOTE: each buffer must be aligned to cache line */
unsigned char tx[RTT_TXCHANNELS][1024] __attribute__((aligned(32)));
unsigned char rx[RTT_RXCHANNELS][1024] __attribute__((aligned(32)));
unsigned char consoleTx[RTT_BUFSZ_CONSOLE_TX] __attribute__((aligned(32)));
unsigned char consoleRx[RTT_BUFSZ_CONSOLE_RX] __attribute__((aligned(32)));
unsigned char phoenixdTx[RTT_BUFSZ_PHOENIXD_TX] __attribute__((aligned(32)));
unsigned char phoenixdRx[RTT_BUFSZ_PHOENIXD_RX] __attribute__((aligned(32)));
} rttBuffers __attribute__((section(".rttmem")));


static const char rtt_tagBackward[] = RTT_TAG_BACKWARD;
static const char *const rtt_txName[RTT_TXCHANNELS] = { "Console TX", "phoenixd TX" };
static const char *const rtt_rxName[RTT_RXCHANNELS] = { "Console RX", "phoenixd RX" };


static const struct {
struct {
unsigned char *buf;
unsigned int bufsz;
const char *name;
} tx[RTT_TXCHANNELS], rx[RTT_RXCHANNELS];
} channelDefs = {
.tx = {
{ rttBuffers.consoleTx, sizeof(rttBuffers.consoleTx), "Console TX" },
{ rttBuffers.phoenixdTx, sizeof(rttBuffers.phoenixdTx), "phoenixd TX" },
},
.rx = {
{ rttBuffers.consoleRx, sizeof(rttBuffers.consoleRx), "Console RX" },
{ rttBuffers.phoenixdRx, sizeof(rttBuffers.phoenixdRx), "phoenixd RX" },
},
};


static volatile struct rtt_desc *rtt = NULL;


Expand Down Expand Up @@ -160,7 +180,7 @@ static ssize_t rtt_writeBlocking(int chan, const void *buf, size_t count)

void rtt_init(void *addr)
{
unsigned int n, m;
size_t n, m;

if (rtt != NULL) {
return;
Expand All @@ -172,18 +192,18 @@ void rtt_init(void *addr)
rtt->txChannels = RTT_TXCHANNELS;
rtt->rxChannels = RTT_RXCHANNELS;

for (n = 0; n < rtt->txChannels; n++) {
rtt->txChannel[n].name = rtt_txName[n];
rtt->txChannel[n].ptr = rttBuffers.tx[n];
rtt->txChannel[n].sz = sizeof(rttBuffers.tx[n]);
for (n = 0; n < (sizeof(channelDefs.tx) / sizeof(channelDefs.tx[0])); n++) {
rtt->txChannel[n].name = channelDefs.tx[n].name;
rtt->txChannel[n].ptr = channelDefs.tx[n].buf;
rtt->txChannel[n].sz = channelDefs.tx[n].bufsz;
rtt->txChannel[n].wr = 0;
rtt->txChannel[n].rd = 0;
}

for (n = 0; n < rtt->rxChannels; n++) {
rtt->rxChannel[n].name = rtt_rxName[n];
rtt->rxChannel[n].ptr = rttBuffers.rx[n];
rtt->rxChannel[n].sz = sizeof(rttBuffers.rx[n]);
for (n = 0; n < (sizeof(channelDefs.rx) / sizeof(channelDefs.rx[0])); n++) {
rtt->rxChannel[n].name = channelDefs.rx[n].name;
rtt->rxChannel[n].ptr = channelDefs.rx[n].buf;
rtt->rxChannel[n].sz = channelDefs.rx[n].bufsz;
rtt->rxChannel[n].wr = 0;
rtt->rxChannel[n].rd = 0;
}
Expand Down
16 changes: 16 additions & 0 deletions hal/armv7m/imxrt/10xx/106x/peripherals.h
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Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,22 @@
#define RTT_ENABLED_PLO 1
#endif

#ifndef RTT_BUFSZ_CONSOLE_TX
#define RTT_BUFSZ_CONSOLE_TX 1024
#endif

#ifndef RTT_BUFSZ_CONSOLE_RX
#define RTT_BUFSZ_CONSOLE_RX 1024
#endif

#ifndef RTT_BUFSZ_PHOENIXD_TX
#define RTT_BUFSZ_PHOENIXD_TX 1024
#endif

#ifndef RTT_BUFSZ_PHOENIXD_RX
#define RTT_BUFSZ_PHOENIXD_RX 1024
#endif


/* UART */
#define UART_MAX_CNT 8
Expand Down
16 changes: 16 additions & 0 deletions hal/armv7m/imxrt/117x/peripherals.h
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Expand Up @@ -31,6 +31,22 @@
#define RTT_ENABLED_PLO 1
#endif

#ifndef RTT_BUFSZ_CONSOLE_TX
#define RTT_BUFSZ_CONSOLE_TX 1024
#endif

#ifndef RTT_BUFSZ_CONSOLE_RX
#define RTT_BUFSZ_CONSOLE_RX 1024
#endif

#ifndef RTT_BUFSZ_PHOENIXD_TX
#define RTT_BUFSZ_PHOENIXD_TX 1024
#endif

#ifndef RTT_BUFSZ_PHOENIXD_RX
#define RTT_BUFSZ_PHOENIXD_RX 1024
#endif


/* UART */

Expand Down
24 changes: 24 additions & 0 deletions hal/armv7m/stm32/l4/peripherals.h
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Expand Up @@ -22,6 +22,30 @@
/* Interrupts */
#define SIZE_INTERRUPTS (217 + 16)


/* DEBUG - RTT PIPE */

#ifndef RTT_ENABLED_PLO
#define RTT_ENABLED_PLO 0
#endif

#ifndef RTT_BUFSZ_CONSOLE_TX
#define RTT_BUFSZ_CONSOLE_TX 1024
#endif

#ifndef RTT_BUFSZ_CONSOLE_RX
#define RTT_BUFSZ_CONSOLE_RX 1024
#endif

#ifndef RTT_BUFSZ_PHOENIXD_TX
#define RTT_BUFSZ_PHOENIXD_TX 1024
#endif

#ifndef RTT_BUFSZ_PHOENIXD_RX
#define RTT_BUFSZ_PHOENIXD_RX 1024
#endif


/* UART */
#define UART_MAX_CNT 5

Expand Down
14 changes: 9 additions & 5 deletions ld/armv7m7-imxrt106x.ldt
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Expand Up @@ -26,12 +26,16 @@
/* Space reserved for kernel data */
#define AREA_KERNEL 0x2000

/* Space reserved for RTT control block and buffers */
#define SIZE_RTTMEM (2 * 2 * 0x400 + 256)


#if defined(__LINKER__)

/* Space reserved for RTT control block and buffers */
#if defined(CUSTOM_RTT_MAP_SIZE)
RTT_MAP_SIZE = CUSTOM_RTT_MAP_SIZE;
#else
RTT_MAP_SIZE = 0x4000;
#endif

/* FlexRAM configuration */
#if defined(CUSTOM_FLEXRAM_CONFIG)
FLEXRAM_CONFIG = CUSTOM_FLEXRAM_CONFIG;
Expand All @@ -54,8 +58,8 @@ MEMORY
/* TODO: use FLEXRAM_CONFIG value to setup ocram/itcm/dtcm partitioning (*32k) */
m_itcm (rwx) : ORIGIN = 0x00000000, LENGTH = FLEXRAM_ITCM_AREA
m_itext (rwx) : ORIGIN = FLEXRAM_ITEXT_ADDR, LENGTH = FLEXRAM_ITEXT_AREA
m_dtcm (rw) : ORIGIN = 0x20000000 + AREA_KERNEL, LENGTH = FLEXRAM_DTCM_AREA - AREA_KERNEL - SIZE_RTTMEM
m_rttmem (rw) : ORIGIN = 0x20000000 + FLEXRAM_DTCM_AREA - SIZE_RTTMEM, LENGTH = SIZE_RTTMEM
m_dtcm (rw) : ORIGIN = 0x20000000 + AREA_KERNEL, LENGTH = FLEXRAM_DTCM_AREA - AREA_KERNEL - RTT_MAP_SIZE
m_rttmem (rw) : ORIGIN = 0x20000000 + FLEXRAM_DTCM_AREA - RTT_MAP_SIZE, LENGTH = RTT_MAP_SIZE
m_ocram (rwx) : ORIGIN = 0x20200000, LENGTH = 0 * 32k
m_flash (rx) : ORIGIN = 0x70000000, LENGTH = 128k /* Not actual flash size. Initial flash size to be put into FCB block for imxrt BootROM init procedure only */
}
Expand Down
14 changes: 9 additions & 5 deletions ld/armv7m7-imxrt117x.ldt
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Expand Up @@ -29,12 +29,16 @@
/* Space reserved for bootloader */
#define AREA_BOOTLOADER 0x10000

/* Space reserved for RTT control block and buffers */
#define SIZE_RTTMEM (2 * 2 * 0x400 + 256)


#if defined(__LINKER__)

/* Space reserved for RTT control block and buffers */
#if defined(CUSTOM_RTT_MAP_SIZE)
RTT_MAP_SIZE = CUSTOM_RTT_MAP_SIZE;
#else
RTT_MAP_SIZE = 0x4000;
#endif

/* FlexRAM configuration */
#if defined(CUSTOM_FLEXRAM_CONFIG)
FLEXRAM_CONFIG = CUSTOM_FLEXRAM_CONFIG;
Expand All @@ -56,8 +60,8 @@ MEMORY
{
m_itcm (rwx) : ORIGIN = 0x00000000, LENGTH = FLEXRAM_ITCM_AREA
m_itext (rwx) : ORIGIN = 0x00000000 + FLEXRAM_ITEXT_ADDR, LENGTH = FLEXRAM_ITEXT_AREA
m_dtcm (rw) : ORIGIN = 0x20000000 + AREA_KERNEL, LENGTH = FLEXRAM_DTCM_AREA - AREA_KERNEL - SIZE_RTTMEM
m_rttmem (rw) : ORIGIN = 0x20000000 + FLEXRAM_DTCM_AREA - SIZE_RTTMEM, LENGTH = SIZE_RTTMEM
m_dtcm (rw) : ORIGIN = 0x20000000 + AREA_KERNEL, LENGTH = FLEXRAM_DTCM_AREA - AREA_KERNEL - RTT_MAP_SIZE
m_rttmem (rw) : ORIGIN = 0x20000000 + FLEXRAM_DTCM_AREA - RTT_MAP_SIZE, LENGTH = RTT_MAP_SIZE
m_ocram1 (rwx) : ORIGIN = 0x20240000 + AREA_BOOTLOADER, LENGTH = (8 * 32k) - AREA_BOOTLOADER
m_ocram2 (rwx) : ORIGIN = 0x202c0000, LENGTH = 512k
m_flash (rx) : ORIGIN = 0x30000000, LENGTH = 128k /* Not actual flash size. Initial flash size to be put into FCB block for imxrt BootROM init procedure only */
Expand Down
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