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Explain sscratch is only swapped by software (#1722)
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* Explain `sscratch` is only swapped by software

Someone familiar with the interrupt handlers of other ISAs may
incorrectly imagine that the current description means that RISCV cores
will automatically perform the swap of `sscratch` with a user register.

This is not the case: it is a recommendation disguised as a description.
Flesh it out a bit so it is less ambiguous.

* Tweak sscratch description

Signed-off-by: Andrew Waterman <aswaterman@gmail.com>

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Signed-off-by: Andrew Waterman <aswaterman@gmail.com>
Co-authored-by: Andrew Waterman <aswaterman@gmail.com>
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workingjubilee and aswaterman authored Nov 12, 2024
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6 changes: 4 additions & 2 deletions src/supervisor.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -490,8 +490,10 @@ access a counter if the corresponding bits in `scounteren` and
The `sscratch` CSR is an SXLEN-bit read/write register, dedicated
for use by the supervisor. Typically, `sscratch` is used to hold a
pointer to the hart-local supervisor context while the hart is executing
user code. At the beginning of a trap handler, `sscratch` is swapped
with a user register to provide an initial working register.
user code.
At the beginning of a trap handler, software normally uses a CSRRW
instruction to swap `sscratch` with an integer register to obtain an
initial working register.

.Supervisor Scratch Register
include::images/bytefield/sscratch.edn[]
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