Simplify

rui314 · Jan 9, 2025 · d2859f5 · d2859f5
1 parent 06a21ef
commit d2859f5
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Showing 2 changed files with 30 additions and 45 deletions.
diff --git a/src/arch-loongarch.cc b/src/arch-loongarch.cc
@@ -563,63 +563,50 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       // We may relax the instructions to the following if its TP-relative
       // address is known at link-time
       //
-      //   <nop>
-      //   <nop>
+      //   <deleted>
+      //   <deleted>
       //   lu12i.w   $a0, foo@TPOFF
       //   addi.w    $a0, $a0, foo@TPOFF
       //
       // or to the following if the TP offset is small enough.
       //
-      //   <nop>
-      //   <nop>
-      //   <nop>
+      //   <deleted>
+      //   <deleted>
+      //   <deleted>
       //   ori       $a0, $zero, foo@TPOFF
       //
       // If the TP-relative address is known at process startup time, we
       // may relax the instructions to the following.
       //
-      //   <nop>
-      //   <nop>
+      //   <deleted>
+      //   <deleted>
       //   pcalau12i $a0, foo@GOTTP
       //   ld.[dw]   $a0, $a0, foo@GOTTP
       //
       // If we don't know anything about the symbol, we can still relax
       // the first two instructions to a single pcaddi as shown below.
       //
-      //   <nop>
+      //   <deleted>
       //   pcaddi    $a0, foo@GOTDESC
       //   ld.d      $ra, $a0, 0
       //   jirl      $ra, $ra, 0
       //
-      // Note that if section-shrinking relaxation is enabled, nop may be
-      // completely deleted.
-      if (removed_bytes == 0) {
-        if (sym.has_tlsdesc(ctx)) {
-          i64 dist = sym.get_tlsdesc_addr(ctx) + A - P;
-          if (ctx.arg.relax && int_cast(dist, 22) == dist) {
-            *(ul32 *)loc = 0x0340'0000; // nop
-          } else {
-            write_j20(loc, hi20(sym.get_tlsdesc_addr(ctx) + A, P));
-          }
-        } else {
-          *(ul32 *)loc = 0x0340'0000; // nop
-        }
-      }
+      // If the code-shrinking relaxation is disabled, we may leave
+      // original useless instructions instead of deleting them, but we
+      // accept that because relaxations are enabled by default.
+      if (sym.has_tlsdesc(ctx) && removed_bytes == 0)
+        write_j20(loc, hi20(sym.get_tlsdesc_addr(ctx) + A, P));
       break;
     case R_LARCH_TLS_DESC_PC_LO12:
-      if (removed_bytes == 0) {
-        if (sym.has_tlsdesc(ctx)) {
-          i64 dist = sym.get_tlsdesc_addr(ctx) + A - P;
-          if (ctx.arg.relax && int_cast(dist, 22) == dist) {
-            // If we can directly materialize the PC-relative address
-            // with pcaddi, do that.
-            *(ul32 *)loc = 0x1800'0000 | get_rd(*(ul32 *)loc); // pcaddi
-            write_j20(loc, dist >> 2);
-          } else {
-            write_k12(loc, sym.get_tlsdesc_addr(ctx) + A);
-          }
+      if (sym.has_tlsdesc(ctx) && removed_bytes == 0) {
+        i64 dist = sym.get_tlsdesc_addr(ctx) + A - P;
+        if (int_cast(dist, 22) == dist) {
+          // If we can directly materialize the PC-relative address
+          // with pcaddi, do that.
+          *(ul32 *)loc = 0x1800'0000 | get_rd(*(ul32 *)loc); // pcaddi
+          write_j20(loc, dist >> 2);
         } else {
-          *(ul32 *)loc = 0x0340'0000; // nop
+          write_k12(loc, sym.get_tlsdesc_addr(ctx) + A);
         }
       }
       break;

diff --git a/src/arch-riscv.cc b/src/arch-riscv.cc
@@ -338,20 +338,18 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       // directly into a register to eliminate a memory load.
       i64 rd = get_rd(buf + rel.r_offset);
 
-      switch (removed_bytes) {
-      case 6:
+      if (removed_bytes == 6) {
         // c.li <rd>, val
         *(ul16 *)loc = 0b010'0'00000'00000'01 | (rd << 7);
         write_citype(loc, sym.get_addr(ctx));
         i += 3;
-        break;
-      case 4:
+      } else if (removed_bytes == 4) {
         // addi <rd>, zero, val
         *(ul32 *)loc = 0b0010011 | (rd << 7);
         write_itype(loc, sym.get_addr(ctx));
         i += 3;
-        break;
-      case 0:
+      } else {
+        assert(removed_bytes == 0);
         if (ctx.arg.relax &&
             sym.is_pcrel_linktime_const(ctx) &&
             i + 3 < rels.size() &&
@@ -372,11 +370,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
             break;
           }
         }
-
         write_utype(loc, G + GOT + A - P);
-        break;
-      default:
-        unreachable();
       }
       break;
     }
@@ -502,7 +496,11 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       //   <deleted>
       //   lui    a0, %tpoff_hi(a0)
       //   addi   a0, a0, %tpoff_lo(a0)
-      if (removed_bytes == 0)
+      //
+      // If the code-shrinking relaxation is disabled, we may leave
+      // original useless instructions instead of deleting them, but we
+      // accept that because relaxations are enabled by default.
+      if (sym.has_tlsdesc(ctx) && removed_bytes == 0)
         write_utype(loc, sym.get_tlsdesc_addr(ctx) + A - P);
       break;
     case R_RISCV_TLSDESC_LOAD_LO12: