data_gpio_nums separate

rzeldent · Dec 13, 2023 · 04f5e65 · 04f5e65
1 parent 424c17c
commit 04f5e65
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Showing 14 changed files with 18 additions and 17 deletions.
diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
@@ -16,7 +16,7 @@ jobs:
       - name: List
         run: ls -laR
       - name: Copy boards
-        run: cp -vv "boards/*.json" "~/.platformio/platforms/espressif32/boards/"
+        run: cp -vv ./boards/*.json ~/.platformio/platforms/espressif32/boards/
       - name: Build firmware
         run: pio ci --lib="." --project-conf "example/platformio.ini" "example/main.cpp"
         env:

diff --git a/boards/ESP32-3248S035R.json b/boards/ESP32-3248S035R.json
@@ -35,8 +35,8 @@
       "-DLED_PIN_R=4",
       "-DLED_PIN_G=16",
       "-DLED_PIN_B=17",
-      "-DHAS_LIGHTSENSOR",
-      "-DCDR_IN=34",
+      "-DHAS_CDS",
+      "-DCDS_IN=34",
       "-DHAS_SPEAKER",
       "-DSPEAKER_PIN=26"
           ],

diff --git a/boards/ESP32-4827S043C.json b/boards/ESP32-4827S043C.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}:{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DUSES_GT911",
       "-DGT911_I2C_HOST=0",
       "-DGT911_I2C_CONFIG={.mode=I2C_MODE_MASTER,.sda_io_num=19,.scl_io_num=20,.sda_pullup_en=GPIO_PULLUP_ENABLE,.scl_pullup_en=GPIO_PULLUP_ENABLE,.master={.clk_speed=400000}}",

diff --git a/boards/ESP32-4827S043N.json b/boards/ESP32-4827S043N.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}:{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DPUSHBUTTON_BOOT=0",
       "-DHAS_TF",
       "-DTF_PIN_CS=5",

diff --git a/boards/ESP32-4827S043R.json b/boards/ESP32-4827S043R.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}:{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DUSES_XPT2046",
       "-DXPT2046_SPI_HOST=SPI2_HOST",
       "-DXPT2046_SPI_BUS_CONFIG={.mosi_io_num=11,.miso_io_num=13,.sclk_io_num=12,.quadwp_io_num=-1,.quadhd_io_num=-1}",

diff --git a/boards/ESP32-8048S043C.json b/boards/ESP32-8048S043C.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}:{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DUSES_GT911",
       "-DGT911_I2C_HOST=0",
       "-DGT911_I2C_CONFIG={.mode=I2C_MODE_MASTER,.sda_io_num=19,.scl_io_num=20,.sda_pullup_en=GPIO_PULLUP_ENABLE,.scl_pullup_en=GPIO_PULLUP_ENABLE,.master={.clk_speed=400000}}",

diff --git a/boards/ESP32-8048S043N.json b/boards/ESP32-8048S043N.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}:{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DPUSHBUTTON_BOOT=0",
       "-DHAS_TF",
       "-DTF_PIN_CS=5",

diff --git a/boards/ESP32-8048S043R.json b/boards/ESP32-8048S043R.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}:{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DUSES_XPT2046",
       "-DXPT2046_SPI_HOST=SPI2_HOST",
       "-DXPT2046_SPI_BUS_CONFIG={.mosi_io_num=11,.miso_io_num=13,.sclk_io_num=12,.quadwp_io_num=-1,.quadhd_io_num=-1}",

diff --git a/boards/ESP32-8048S050C.json b/boards/ESP32-8048S050C.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}?{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DUSES_GT911",
       "-DGT911_I2C_HOST=0",
       "-DGT911_I2C_CONFIG={.mode=I2C_MODE_MASTER,.sda_io_num=19,.scl_io_num=20,.sda_pullup_en=GPIO_PULLUP_ENABLE,.scl_pullup_en=GPIO_PULLUP_ENABLE,.master={.clk_speed=400000}}",

diff --git a/boards/ESP32-8048S050N.json b/boards/ESP32-8048S050N.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}?{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DPUSHBUTTON_BOOT=0",
       "-DHAS_TF",
       "-DTF_PIN_CS=5",

diff --git a/boards/ESP32-8048S050R.json b/boards/ESP32-8048S050R.json
@@ -19,7 +19,7 @@
       "-DPIN_BCKL=2",
       "-DUSES_LCD_RGB",
       "-DRBG_PANEL_GPIO=(LV_COLOR_16_SWAP!=0?{15,16,4,45,48,47,21,14,8,3,46,9,1,5,6,7}?{8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14})",
-      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
+      "-DRBG_PANEL_CONFIG={.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}",
       "-DUSES_XPT2046",
       "-DXPT2046_SPI_HOST=SPI2_HOST",
       "-DXPT2046_SPI_BUS_CONFIG={.mosi_io_num=11,.miso_io_num=13,.sclk_io_num=12,.quadwp_io_num=-1,.quadhd_io_num=-1}",

diff --git a/example/platformio.ini b/example/platformio.ini
@@ -126,8 +126,8 @@ board = ESP32-1732S019C
 build_flags = ${env.build_flags}
 lib_deps = ${env.lib_deps}
 
-[env:ESP32-1732S019R]
-board = ESP32-1732S019R
+[env:ESP32-1732S019N]
+board = ESP32-1732S019N
 build_flags = ${env.build_flags}
 lib_deps = ${env.lib_deps}
 

diff --git a/include/esp32_smartdisplay.h b/include/esp32_smartdisplay.h
@@ -293,7 +293,7 @@
 #else
 #define RBG_PANEL_GPIO {8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14}
 #endif
-#define RBG_PANEL_CONFIG {.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}
+#define RBG_PANEL_CONFIG {.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=43,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=12,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}
 // Touch
 #ifdef ESP32_4827S043R
 #define USES_XPT2046
@@ -332,7 +332,7 @@
 #else
 #define RBG_PANEL_GPIO {8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14}
 #endif
-#define RBG_PANEL_CONFIG {.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}
+#define RBG_PANEL_CONFIG {.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}
 
 // Touch
 #ifdef ESP32_8048S043R
@@ -372,7 +372,7 @@
 #else
 #define RBG_PANEL_GPIO {8,3,46,9,1,5,6,7,15,16,4,45,48,47,21,14}
 #endif
-#define RBG_PANEL_CONFIG {.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.data_gpio_nums=RBG_PANEL_GPIO,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}
+#define RBG_PANEL_CONFIG {.clk_src=LCD_CLK_SRC_PLL160M,.timings={.pclk_hz=16000000,.h_res=TFT_WIDTH,.v_res=TFT_HEIGHT,.hsync_pulse_width=4,.hsync_back_porch=8,.hsync_front_porch=8,.vsync_pulse_width=4,.vsync_back_porch=8,.vsync_front_porch=8,.flags={.hsync_idle_low=1,.vsync_idle_low=1,.pclk_active_neg=1,}},.data_width=16,.psram_trans_align=64,.hsync_gpio_num=39,.vsync_gpio_num=41,.de_gpio_num=40,.pclk_gpio_num=42,.disp_gpio_num=-1,.flags={.fb_in_psram=1}}
 // Touch
 #ifdef ESP32_8048S050R
 #define USES_XPT2046

diff --git a/src/smartdisplay_rgb.c b/src/smartdisplay_rgb.c
@@ -27,6 +27,7 @@ void lvgl_tft_init(lv_disp_drv_t *drv)
 
     // Create direct_io panel handle
     esp_lcd_rgb_panel_config_t tft_panel_config = RBG_PANEL_CONFIG;
+    tft_panel_config.data_gpio_nums = RBG_PANEL_GPIO;
     tft_panel_config.on_frame_trans_done = direct_io_frame_trans_done;
     tft_panel_config.user_ctx = drv;