adiv5_jtag: Properly dispatch the LPC43xx PARTNO code

sidprice · Jan 15, 2025 · d643492 · d643492
1 parent b55b6e3
commit d643492
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Showing 2 changed files with 5 additions and 9 deletions.
diff --git a/src/target/adiv5.h b/src/target/adiv5.h
@@ -213,11 +213,10 @@
 #define JTAG_IDCODE_PARTNO_SOC400_4BIT 0xba00U
 #define JTAG_IDCODE_PARTNO_SOC400_8BIT 0xba03U
 /*
- * This PARTNO value comes from the LPC43xx parts which have a bugged pair of TAPs.
- * This value is actually reserved as a SWD-DPv1 value, but appears anyway on those devices
- * for the second and third JTAG-DPs which are still JTAG-DPv0.
+ * This PARTNO value comes from the LPC43xx parts which have a pair of Cortex-M0's using DPv1 TAPs.
+ * Value lifted from UM10503, §50.9 JTAG TAP Identification, Table 1170, pg1355
  */
-#define JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA 0xba01U
+#define JTAG_IDCODE_PARTNO_SOC400_4BIT_LPC43xx 0xba01U
 
 /*
  * ARM JTAG PARTNO values from Cortex-M33 TRM (ARM document ID 100230, issue 0100_03)

diff --git a/src/target/adiv5_jtag.c b/src/target/adiv5_jtag.c
@@ -80,13 +80,10 @@ void adiv5_jtag_dp_handler(const uint8_t dev_index)
 
 	/* Check which version of DP we have here, if it's an ARM-made DP, and set up `dp->version` accordingly */
 	if (dp->designer_code == JEP106_MANUFACTURER_ARM) {
-		/* Correct the LPC43xx errata PARTNO values */
-		if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA)
-			dp->partno = JTAG_IDCODE_PARTNO_SOC400_4BIT;
-
 		if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC400_8BIT)
 			dp->version = 0U;
-		else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33)
+		else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33 ||
+			dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_LPC43xx)
 			dp->version = 1U;
 		else if (dp->partno == JTAG_IDCODE_PARTNO_SOC600_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC600_8BIT)
 			dp->version = 3U;