A 32-bit Signed Vedic Multiplier created using Verilog HDL utilising Vedic Mathematic Sutras formed using Carry Lookahead Adders as the basic building blocks.
verilog vlsi xilinx-vivado carry-look-ahead-adder multipliers vedic-mathematics signed-unsigned-multiplication 32-bit-multiplication
-
Updated
Aug 2, 2024 - Verilog