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Refactor: move the x87-specific FpuOperand to Arch/X86/FpuOperand.cs
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Clean up + comments.
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uxmal committed Nov 21, 2023
1 parent 0d09818 commit c163e5d
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Showing 6 changed files with 56 additions and 65 deletions.
43 changes: 43 additions & 0 deletions src/Arch/X86/FpuOperand.cs
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#region License
/*
* Copyright (C) 1999-2023 John Källén.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#endregion

using Reko.Core.Machine;
using Reko.Core.Types;

namespace Reko.Arch.X86
{
/// <summary>
/// Represents an x87 FPU operand.
/// </summary>
public class FpuOperand : AbstractMachineOperand
{
public FpuOperand(int f) : base(PrimitiveType.Real64)
{
StNumber = f;
}

public int StNumber { get; }

protected override void DoRender(MachineInstructionRenderer renderer, MachineInstructionRendererOptions options)
{
renderer.WriteString($"st({StNumber})");
}
}
}
36 changes: 0 additions & 36 deletions src/Core/Expressions/Identifier.cs
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Expand Up @@ -18,10 +18,8 @@
*/
#endregion

using Reko.Core;
using Reko.Core.Operators;
using Reko.Core.Types;
using System;
using System.Collections.Generic;
using System.IO;

Expand Down Expand Up @@ -131,38 +129,4 @@ public void WriteType(bool writeStorage, TextWriter writer)
writer.Write(DataType);
}
}

/// <summary>
/// This class identifies an address space within a program.
/// </summary>
/// <remarks>
/// Instances of <see cref="Reko.Core.Expressions.MemoryAccess"/> need to
/// indicate what address space is being used to perform the memory access.
/// On von Neumann architectures, where all of memory is treated equal,
/// there is only need for the <see cref="GlobalMemory"/>. On
/// Harvard architectures, where there may be two or more separate address
/// spaces (e.g. one for instructions and one for data), the corresponding
/// <see cref="IProcessorArchitecture"/> implementation must define an
/// appropriate MemoryIdentifier for each separate address space. The
/// IProcessorarchitecture must then ensure that when RtlInstructions for
/// memory accesses are generated, they refer to the correct address space.
/// <para>
/// Later, SSA analysis will break apart memory access
/// after each store operation, giving rise to new address space identifiers
/// MEM1, MEM2 &c. If ambitious, memory alias analysis can be done. In this
/// case, we will have several MEMx variables before SSA, each MEMx variable
/// will be an alias class.
/// </para>
/// </remarks>
[Obsolete("", true)]
public class MemoryIdentifier : Identifier
{
public MemoryIdentifier(int i, DataType dt) : base("Mem" + i, dt, MemoryStorage.Instance)
{
}

public MemoryIdentifier(string name, DataType dt, Storage stg) : base(name, dt, stg)
{
}
}
}
1 change: 0 additions & 1 deletion src/Core/Graphs/DfsIterator.cs
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Expand Up @@ -21,7 +21,6 @@
using System;
using System.Collections.Generic;
using System.Linq;
using System.Security.Cryptography;

namespace Reko.Core.Graphs
{
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24 changes: 1 addition & 23 deletions src/Core/Machine/MachineOperand.cs
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Expand Up @@ -41,7 +41,7 @@ public interface MachineOperand

/// <summary>
/// Renders the operand as a string, according to the specified
// <paramref name="options" />.
/// <paramref name="options" />.
string ToString(MachineInstructionRendererOptions options);

/// <summary>
Expand Down Expand Up @@ -277,28 +277,6 @@ protected override void DoRender(MachineInstructionRenderer renderer, MachineIns
}
}

/// <summary>
/// Represents a FPU operand.
/// </summary>
public class FpuOperand : AbstractMachineOperand
{
private readonly int fpuReg;

public FpuOperand(int f) : base(PrimitiveType.Real64)
{
fpuReg = f;
}

public int StNumber
{
get { return fpuReg; }
}

protected override void DoRender(MachineInstructionRenderer renderer, MachineInstructionRendererOptions options)
{
renderer.WriteString("st(" + fpuReg + ")");
}
}
}


5 changes: 5 additions & 0 deletions src/Core/Storage.cs
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Expand Up @@ -758,6 +758,11 @@ void MachineOperand.Render(MachineInstructionRenderer renderer, MachineInstructi
Render(renderer, options);
}

/// <summary>
/// Represents a value that is stored sequentially as a tuple of sub-
/// storages (like the dx:ax idiom on x86). Sub-storages are not
/// restricted to being <see cref="RegisterStorage"/>s.
/// </summary>
public class SequenceStorage : Storage, MachineOperand
{
public SequenceStorage(params Storage[] elements) : this(
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12 changes: 7 additions & 5 deletions subjects/regression.log

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