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Simplified Instructional Computer
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Simplified Instructional Computer (SIC) is a hypothetical computer that includes the hardware features most often found on real machines. It has two models:
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Sic standard model
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SIC/XE (Extra Equipment) model.
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Upward compatible
A program written in SIC should run on SIC/XE
SIC machine Architecture
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Memory
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8-bit bytes
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3 consecutive bytes form a word, addressed by the lowest byte
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Memory size is
$2^{15} =$ (32768) bytes
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Registers : Total five registers / 24- bits each
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A : Accumulator : 0 : used for arithmetic operations
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X : Index register : 1 : used for addressing
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L : Linkage register : 2 : the jump to subroutine (JSUB) instruction stores the return address in this register
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PC :Program counter : 8 : contain the address of the next instruction to be fetched for execution
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SW : Status word : 9 : contain a variety of information, including a condition code.
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Data Formats:
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Integers are stored as 24-bit binary numbers; 2’s complement representation is used for negative values
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No floating-point hardware
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Machine architecture
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Addressing Modes
Mode Indication Target address calculation
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Direct X=0 TA = address
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Indexed X=1 TA= address + (X)
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Instruction Set
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Instruction Set:
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load and store: LDA, LDX, STA, STX, etc.
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integer arithmetic operations: ADD, SUB, MUL, DIV, etc.
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All arithmetic operations involve register A and a word in memory, with the result being left in the register
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comparison: COMP
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COMP compares the value in register A with a word in memory, this instruction sets a condition code CC to indicate the result
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conditional jump instructions: JLT, JEQ, JGT
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these instructions test the setting of CC and jump accordingly
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subroutine linkage: JSUB, RSUB
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JSUB jumps to the subroutine, placing the return address in register L
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RSUB returns by jumping to address contained in register L
Instruction Set
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Input and Output: :
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Input and output are performed by transferring 1 byte at a time to or form the rightmost 8 bits of register A
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Each device is assigned a unique 8-bit code 8
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Three I/O instructions: 1- Test device (TD): 2- Read Data (RD) 3- Write Data (WD)
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Data movement
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No memory-memory move instruction
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3-byte word: LDA, STA, LDL, STL, LDX, STX
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1-byte: LDCH, STCH
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Storage definition
– WORD, RESW
– BYTE, RESB
Development of Assembler For Assembler Development JAVA was
used
The class diagram for Assembler class is\
Support for Assembler Class Pass1(): void
It creates intermediate file and help in solving the problem of forward
Refrence
Its output are Symbol table
Pass2():void:
It creates the final object code file or we say machine code
Its output is object code
assemble():void
It helps in reading the program line by line and updates the location
counter
Simulator It loads the program in the memory and executes the instructions\
The class diagram is shown
GUI implemented class has output as : symbol table,object code,register contents and memory dump.
Final Product
Simulator in Action
- Final Slide deck for presentation available here